Table of Contents
Data
Address
Register
Bus
(Low)
Name
Width Bit 7
H'FFF20
MAR0AR
8
H'FFF21
MAR0AE
8
H'FFF22
MAR0AH
8
H'FFF23
MAR0AL
8
H'FFF24
ETCR0AH 8
H'FFF25
ETCR0AL 8
H'FFF26
IOAR0A
8
H'FFF27
DTCR0A
8
H'FFF28
MAR0BR
8
H'FFF29
MAR0BE
8
H'FFF2A
MAR0BH
8
H'FFF2B
MAR0BL
8
H'FFF2C
ETCR0BH 8
H'FFF2D
ETCR0BL 8
H'FFF2E
IOAR0B
8
H'FFF2F
DTCR0B
8
H'FFF30
MAR1AR
8
H'FFF31
MAR1AE
8
H'FFF32
MAR1AH
8
H'FFF33
MAR1AL
8
H'FFF34
ETCR1AH 8
H'FFF35
ETCR1AL 8
H'FFF36
IOAR1A
8
H'FFF37
DTCR1A
8
H'FFF38
MAR1BR
8
H'FFF39
MAR1BE
8
H'FFF3A
MAR1BH
8
H'FFF3B
MAR1BL
8
H'FFF3C
ETCR1BH 8
H'FFF3D
ETCR1BL 8
H'FFF3E
IOAR1B
8
H'FFF3F
DTCR1B
8
638
Bit 6
Bit 5
DTE
DTSZ
DTID
DTE
DTSZ
SAID
DTE
DTSZ
DTID
DTME
—
DAID
DTE
DTSZ
DTID
DTE
DTSZ
SAID
DTE
DTSZ
DTID
DTME
—
DAID
Register Name
Bit 4
Bit 3
Bit 2
RPE
DTIE
DTS2
SAIDE
DTIE
DTS2A DTS1A DTS0A Full address mode
RPE
DTIE
DTS2
DAIDE
TMS
DTS2B DTS1B DTS0B Full address mode
RPE
DTIE
DTS2
SAIDE
DTIE
DTS2A DTS1A DTS0A Full address mode
RPE
DTIE
DTS2
DAIDE
TMS
DTS2B DTS1B DTS0B Full address mode
Module
Bit 1
Bit 0
name
DMAC channel 0A
DTS1
DTS0
Short address mode
DMAC channel 0B
DTS1
DTS0
Short address mode
DMAC channel 1A
DTS1
DTS0
Short address mode
DMAC channel 1B
DTS1
DTS0
Short address mode
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