Table of Contents
• Idle cycle insertion
An idle cycle can be inserted in case of an external read cycle between different areas
An idle cycle can be inserted when an external read cycle is immediately followed by an
external write cycle
• Bus arbitration function
A built-in bus arbiter grants the bus right to the CPU, DMAC, DRAM interface, or an
external bus master
• Other features
The refresh counter (refresh timer) can be used as an interval timer
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