Pin Configuration; Register Configuration - Hitachi H8/3035 Series Hardware Manual

Single-chip microcomputer
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5.1.3 Pin Configuration

Table 5-1 lists the interrupt pins.
Table 5-1 Interrupt Pins
Name
Nonmaskable interrupt
External interrupt request 4 to 0 IRQ

5.1.4 Register Configuration

Table 5-2 lists the registers of the interrupt controller.
Table 5-2 Interrupt Controller Registers
Address
Name
*1
H'FFF2
System control register
H'FFF4
IRQ sense control register
H'FFF5
IRQ enable register
H'FFF6
IRQ status register
H'FFF8
Interrupt priority register A
H'FFF9
Interrupt priority register B
Notes: 1. Lower 16 bits of the address.
2. Only 0 can be written, to clear flags.
Abbreviation I/O
Function
NMI
Input Nonmaskable interrupt, rising edge or
falling edge selectable
to IRQ
Input Maskable interrupts, falling edge or level
4
0
sensing selectable
Abbreviation
SYSCR
ISCR
IER
ISR
IPRA
IPRB
R/W
Initial Value
R/W
H'0B
R/W
H'00
R/W
H'00
R/(W)
H'00
*2
R/W
H'00
R/W
H'00
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H8/3035H8/3034H8/3033

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