Section 1 Overview; Overview - Hitachi H8/3035 Series Hardware Manual

Single-chip microcomputer
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Section 1 Overview

1.1 Overview

The H8/3035 Series comprises microcomputers (MCUs) that integrate system supporting
functions together with an H8/300H CPU core featuring an original Hitachi architecture.
The H8/300H CPU has a 32-bit internal architecture with sixteen 16-bit general registers, and a
concise, optimized instruction set designed for speed. It can address a 16-Mbyte linear address
space. Its instruction set is upward-compatible at the object-code level with the H8/300 CPU,
enabling easy porting of software from the H8/300 Series.
The on-chip system supporting functions include ROM, RAM, a 16-bit integrated timer unit
(ITU), a programmable timing pattern controller (TPC), a watchdog timer (WDT), a serial
communication interface (SCI), an A/D converter, I/O ports, and other facilities.
The H8/3035 Series consists of three models: the H8/3035 with 256 kbytes of ROM and 4 kbytes
of RAM, the H8/3034 with 192 kbytes of ROM and 4 kbytes of RAM, and the H8/3033 with 128
kbytes of ROM and 4 kbytes of RAM.
The three MCU operating modes offer a choice of expanded mode and single-chip mode.
version with user-
In addition to the masked-ROM versions of the H8/3035 Series, a ZTAT™
*
programmable on-chip PROM is also available. This version enables users to respond quickly
and flexibly to changing application specifications, growing production volumes, and other
conditions.
Table 1-1 summarizes the features of the H8/3035 Series.
Note: *
ZTAT (Zero Turn-Around Time) is a trademark of Hitachi, Ltd.
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H8/3035H8/3034H8/3033

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