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Contention between TCNT Byte Write and Increment: If an increment pulse occurs in the T
or T
state of a TCNT byte write cycle, writing takes priority and TCNT is not incremented. The
3
TCNT byte that was not written retains its previous value. See figure 8-63, which shows an
increment pulse occurring in the T
ø
Address
Internal write signal
TCNT input clock
TCNTH
TCNTL
Figure 8-63 Contention between TCNT Byte Write and Increment
240
state of a byte write to TCNTH.
2
TCNTH byte write cycle
T
T
1
2
TCNTH address
N
TCNTH write data
X
T
3
M
X + 1
X
2
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