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17.2
Block Diagram of Address Match Detection Function
The address match detection module consists of the following blocks:
• Address latch
• Address detection control register (PACSR)
• Detect address setting registers
I Block Diagram of Address Match Detection Function
Figure 17.2-1 shows the block diagram of the address match detection function.
Figure 17.2-1 Block Diagram of Address Match Detection Function
Detect address setting registers 0
Detect address setting registers 1
Reserved
: Always set this bit to 0.
G
Address latch
The address latch stores the value of the address output to the internal data bus.
G
Address detection control register (PACSR)
The address detection control register enables or disables output of an interrupt at an address match.
G
Detect address setting registers (PADR0, PADR1)
The detect address setting registers set the address that is compared with the value of the address latch.
Address latch
PADR0 (24bit)
PADR1 (24bit)
PACSR
Reserved
Reserved Reserved Reserved
Address detection controlregister(PACSR)
CHAPTER 17 Address Match Detecting Function
AD1E
AD0E
Reserved
Reserved
INT9 instruction
(INT9 interrupt generated)
557
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