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Table 4.7-3 Functions of the Registers for Port 5
Register
Data
Name
0
Port 5 data
register
(PDR5)
1
0
Port 5
direction
register
(DDR5)
1
Analog input
0
enable register
1
(ADER)
R/W: Read/Write
X: Undefined
Reference:
• When using port 5 as an analog input pin, set the pin corresponding to the analog input in
the DDR5 as an input port.
• When using port 5 as the input pin of the resource, clear the bit in the DDR5
corresponding to the input pin of the resource to "0" and set the input pin as an input port.
At Read
"0" is set for the output
The pin state is
latch, and when the pin is
Low level.
an output port pin, the Low
level is output to the pin.
"1" is set for the output
The pin state is
latch, and when the pin is
High level.
an output port pin, the High
level is output to the pin.
The output buffer is set to
The direction
"OFF", and the pin
latch is "0".
becomes an input port pin.
The output buffer is set to
The direction
"ON", and the pin becomes
latch is "1".
an output port pin
General-purpose I/O ports
Analog input mode
Read/
At Write
Write
R/W
R/W
R/W
CHAPTER 4 I/O PORT
Register
Reset Value
Address
000005
XXXXXXXX
H
B
000015
00000000
H
B
00001B
11111111
H
B
187
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