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POWER AMPLIFIER PAC, MODEL PA-336
The Power Amplifier PAC, Model PA-336 (Figures A-100 and A-101), contains
six 3-input NAND gates that can be used for driving heavy loads.
Built-in short-circuit
protection limits output current if the output is accidentally grounded.
CIRCUIT FUNCTION
Each gate performs the NAND function for positive logic (positive voltage is a ONE
and Ov is a ZERO).
For negative logic, it becomes a NOR gate.
When all inputs to a gate
are at positive or not connected, the output goes to ground.
When any input is at ground,
the output goes to a positive voltage.
NOTE
The following pins must be jumpered together on the connector into
which a PA-336 is inserted.
These jumpers should be made as short
as possible.
SPE CIFICA TIO NS
Pin
1 to pin 33
Pin
4 to pin 3 1
Pin 1 3 to pin 3 2
Frequency of Operation (System)
DC to 5 me
Input Loading
2 unit loads each
Current Requirements
+6v:
80 ma (max)
Power Dissipation
0. 48w (max) static,
0. 7 8w (max) at 5 me and with
250 pf stray capacitance
Handle Color Code
Green
APPLICATIONS
Pin
9 to pin 32
Pin 21 to pin 31
Output Drive Capability
25 unit loads
Circuit Delay
(Measured at +l. 5v, averaged
over two stages)
3 0 ns ec (max)
The power gates operate on levels, pulses, or with combinations of both.
Two
gates can be wired back to back to form a de set/reset power flip-flop.
A-181
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