Status Bit Sequencing For Slc 5/03, Slc 5/04, And Slc 5/05 Msg Instruction; Rung Goes True - Allen-Bradley SLC 500 Series Reference Manual
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Status Bit Sequencing for
SLC 5/03, SLC 5/04, and
SLC 5/05 MSG Instruction
1.Rung goes True.
EN
EW
ST
DN
ER
NR
TO
WQ 1
The following section describes the status bit sequencing for an SLC 5/03,
SLC 5/04, or SLC 5/05 MSG instruction.
2.Target node
receives packet.
2
1
3
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
Rung Goes True
When the MSG rung becomes true and the MSG is scanned, if there is room
in any of the four active MSG buffers and no other MSG are in the queue, the
MSG is immediately placed in an available buffer, and the EN and EW bits are
set. If this was a MSG Write instruction, the source data would be transferred
to the MSG buffer at this time. If there is no room in the four MSG buffers or
other MSG instructions are already in the queue, and a position is available in
the MSG queue, then the MSG enters the queue and only the EN bit is set.
The 10-position MSG queue works on a first-in-first-out basis that allows the
SLC processor to remember the order the MSG instructions were enabled.
Note that the program does not have access to the SLC MSG queue.
If there is no room in any of the four MSG buffers and no room in the
10-position MSG queue, only the WQ bit is set. Note that when the WQ bit is
set, the MSG instruction must be re-scanned with true rung conditions at a
later time when there is room in either the four MSG buffers or the
10-position MSG queue.
3.Acknowledge sent
4.Not shown.
of successful receipt.
Publication 1747-RM001G-EN-P - November 2008
SLC Communication Instructions
5.Target node processes packet
successfully and returns data
(read) or writes data (success).
5
12-37
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