Iie Operation; Iid/Iie Zone Example - Allen-Bradley SLC 500 Series Reference Manual
Hide thumbs
Also See for SLC 500 Series:
- Manual (270 pages) ,
- Quick start manual (70 pages) ,
- Migration manual (60 pages)
Table of Contents
The first pass bit S:1/15 and the IIE instruction
in rung 0 are included to insure that the I/O
interrupt function is initialized following a
power cycle. You should include a rung such as
this any time your program contains an IID/IIE
zone or an IID instruction.
The IID instruction in rung 6 clears the I/O
interrupt enable bits associated with slots 1,2,
and 7 (S:27/1, S:27/2, and S:27/7). The IIE
instruction in rung 12 sets these same bits. If an
I/O interrupt is detected by the processor while
the processor is executing rungs 7-11, the
interrupt will be marked as pending. (S:25//1,
S:25/2, and/or S:25/7 will be set.) All interrupts
marked as pending are serviced upon execution
of rung 12. The lowest numbered slot is serviced
first when multiple pending bits are set.
IIE Operation
When true, this instruction sets the I/O interrupt enable bits (S:27/1 through
S:28/14) corresponding to the slots parameter of the instruction. Interrupt
subroutines of the affected slots regain the ability to execute when an interrupt
request is made. If an interrupt was pending (S:25/1 through S:26/14) and the
pending slot corresponds to the IIE slots parameter, the ISR associated with
that slot executes immediately.
IID/IIE Zone Example
In the program below, slots 1, 2, and 7 are capable of generating I/O
interrupts. The IID and IIE instructions in rungs 6 and 12 are included to
avoid having I/O interrupt ISRs execute as a result of interrupt requests from
slots 1, 2, or 7. This allows rungs 7 through 11 to execute without interruption.
The following program will demonstrate a IIE and a IID.
First Pass
0000
Any Bit
0001
Any Bit
0002
0003
ISR execution
Any Bit
will not occur
0004
between IID
Any Bit
and IIE
0005
instructions.
0006
Any Bit
0007
Any Bit
0008
0009
Understanding Interrupt Routines
IIE IID Example 5
S:1
15
B3:0
0
B3:0
1
Any Bit
B3:0
B3:1
2
2
B3:0
3
B3:0
4
B3:0
5
Publication 1747-RM001G-EN-P - November 2008
11-33
IIE
IIE
I/OInterrupt Enable
Slots
1-2,7
Any Bit
B3:2
0
Any Bit
B3:2
0
IID
IID
I/OInterrupt Disable
Slots
1-2,7
Any Bit
B3:2
0
Any Bit
B3:2
0
IIE
IIE
I/OInterrupt Enable
Slots
1-2,7
Any Bit
B3:2
0
Any Bit
B3:2
0
END
Chapters
Table of Contents
