Table of Contents
N-Register (7 bits, N, N)
The N-register is used to facilitate the instruction decoding process. The register contains
the high order 7 bits of the instruction to be executed. In the step/stop mode, the register
will contain the operation code of the last instruction executed.
P-Counter (14 bits, P, A)
The P-counter contains the address of the next instruction to be executed. Some bits of the
P-counter are used for generating addresses.
The P-counter will count up through program
banks.
Q-Counter (14 bits, Q, A)
The Q-counter serves as the elapsed time clock.
Y-Register (18 bits, Y, N)
The Y-register is used to form and hold the intermediate operand for an instruction.
Z Drivers (18 bits, Z, N)
The Z drivers are a common data distribution center for all data coming from the arithmetic
unit and going to a working register, memory, control unit, or an input/output (I/O) channel.
Data passes through the Z drivers without delay .enroute to the destination determined by the
instruction being
ex~cuted
at the time that the data exists in the drivers.
Arithmetic Unit (18 bits, no abb., N)
The arithmetic unit performs the following functions on the contents of Y and/or M and puts
the result into the Z drivers:
1.
Binary addition
2.
Logical AND
3.
Logical OR
4.
Logical EXCLUSIVE OR
5.
Shift left, right, circulate
6.
Bit change
7.
Address modification.
Branch Flip-Flops (BFF' s, A)
The plus, zero, and even flip-flops are connected to the Z drivers. These three flip-flops
are set at the completion of every non-branch instruction and will reflect the branch conditions
of any data passing through the Z drivers.
The plus FF (PFF) stores the status of the high
1-12
Table of Contents
