Erase Block Register 1 (Ebr1); Erase Block Register 2 (Ebr2) - Hitachi H8/3062 Hardware Manual

Single-chip microcomputer h8/3062 series; h8/3062b series; h8/3062f-ztat series; h8/3064f-ztat series
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18.3.3

Erase Block Register 1 (EBR1)

Bit
7
EB7
Initial value
0
Read/Write
R/W
EBR1 is an 8-bit register that specifies the flash memory erase area block by block. EBR1 is
initialized to H'00 by a reset, in hardware standby mode and software standby mode, when a low
level is input to the FWE pin, and when a high level is input to the FWE pin and the SWE bit in
FLMCR1 is not set. When a bit in EBR1 is set to 1, the corresponding block can be erased. Other
blocks are erase-protected. Only one bit can be set in EBR1 and EBR2 together; do not set two or
more bits at the same time. When the on-chip flash memory is disabled, a read access to this
register will return H'00, and erasing is disabled.
The flash memory block configuration is shown in table 18.5. To erase the entire flash memory,
each block must be erased in turn.
As the H8/3064F-ZTAT B-mask version does not support on-board programming modes in mode
6, EBR1 register bits cannot be set to 1 in this mode.
18.3.4

Erase Block Register 2 (EBR2)

Bit
7
Initial value
0
Read/Write
R
EBR2 is an 8-bit register that specifies the flash memory erase area block by block. EBR2 is
initialized to H'00 by a reset, in hardware standby mode and software standby mode, and when a
low level is input to the FWE pin. When a high level is input to the FWE pin and the SWE bit in
FLMCR1 is not set, it is initialized to bit 0. When a bit in EBR2 is set to 1, the corresponding
block can be erased. Other blocks are erase-protected. Only one bit can be set in EBR1 and EBR2
together; do not set two or more bits at the same time. When the on-chip flash memory is disabled,
a read will return H'00, and erasing is disabled.
The flash memory block configuration is shown in table 18.5. To erase the entire flash memory,
each block must be erased in turn.
As the H8/3064F-ZTAT B-mask version does not support on-board programming modes in mode
6, EBR2 register bits cannot be set to 1 in this mode.
532
6
5
EB6
EB5
0
0
R/W
R/W
6
5
0
0
R
R
4
3
EB4
EB3
0
0
R/W
R/W
4
3
EB11
EB10
0
0
R
R/W
2
1
EB2
EB1
0
0
R/W
R/W
2
1
EB9
0
0
R/W
R/W
0
EB0
0
R/W
0
EB8
0
R/W
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