Related Manuals for GE CPCI3UX606
Summary of Contents for GE CPCI3UX606
- Page 1 Intelligent Platforms Hardware Reference Manual CPCI3UX606 First Edition Publication No. CPCI3UX606-HRM/1...
- Page 2 Document History Edition Date Board Artwork Revision First May 2010 Rev 1 Waste Electrical and Electronic Equipment (WEEE) Returns GE Intelligent Platforms Limited is registered with an approved Producer Compliance Scheme (PCS) and, subject to suitable contractual arrangements being in place, will ensure WEEE is processed in accordance with the requirements of the WEEE Directive. GE Intelligent Platforms Limited. will evaluate requests to take back products purchased by our customers before August 13, 2005 on a case by case basis. A WEEE management fee may apply. Publication No. CPCI3UX606-HRM/1...
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Page 3: Table Of Contents
1 • CPCI3UX606 ........ -
Page 4: Cpci3Ux606
1 • CPCI3UX606 The information contained in this manual must be used in conjunction with the I/O Modules Manual. LINK I/O Modules Manual, publication number RT5154. 1.1 Description The CPCI3UX606 module is a customized interface adapter, compatible with 3U CompactPCI backplanes. It fits directly onto the rear P2 position of the backplane and is only suitable for interconnection with the IMP3A host card. See the I/O Modules Manual ‐ Compatibility Tables for more information. The CPCI3UX606 is suitable for fitting in rear guide‐rails, according to IEEE1101.11. Figure 1-1 CPCI3UX606 4 CPCI3UX606 Publication No. CPCI3UX606-HRM/1... -
Page 5: Connector And Header Designations
Do not fit a jumper across the E1 pins. If a build option that provides USB has been selected, linking these pins will short USB_PWR to ground, which may cause damage to the IMP3A. Figure 1-2 RS422/485 Signal Definition Publication No. CPCI3UX606-HRM/1 CPCI3UX606 5... -
Page 6: Breakout Panel Connectivity
Availability of signals at the various connectors depends on the I/O option selected on the IMP3A. See the hardware reference manual for more details. LINK IMP3A Hardware Reference Manual, publication number IMP3A-HRM. 1.3 Breakout Panel Connectivity Table 1-3 Breakout Panel Connectivity Breakout Panels CPCI3UX606 header P2 6 CPCI3UX606 Publication No. CPCI3UX606-HRM/1... -
Page 7: Pin Assignments
12 COM2_LB 13 COM2_TXD (TXD_A) 14 COM2_LB 15 COM2_LB 16 COM2_RXD (RXD_A) 17 COM2_RTS (TXD_B) 18 COM2_CTS (RXD_B) 19 GND 20 GND a.Connected between pins 1, 2 and 3. b.Connected between pins 12, 14 and 15. Publication No. CPCI3UX606-HRM/1 CPCI3UX606 7... -
Page 8: P3 (Gpio)
15 GPIO7 16 GND 17 GPIO8 18 GND 19 GPIO9 20 GND 21 GPIO10 22 GND 23 GPIO11 24 GND 25 GPIO12 26 GND 27 GPIO13 28 GND 29 GPIO14 30 GND 31 GPIO15 32 GND 8 CPCI3UX606 Publication No. CPCI3UX606-HRM/1... -
Page 9: P4 (Pmc 1 To 32 I/O)
Pin Signal Pin Signal J14-1 J14-2 J14-3 J14-4 J14-5 J14-6 J14-7 J14-8 J14-9 J14-10 J14-11 J14-12 J14-13 J14-14 J14-15 J14-16 J14-17 J14-18 J14-19 J14-20 J14-21 J14-22 J14-23 J14-24 J14-25 J14-26 J14-27 J14-28 J14-29 J14-30 J14-31 J14-32 Publication No. CPCI3UX606-HRM/1 CPCI3UX606 9... -
Page 10: P5 (Pmc 33 To 64 I/O)
J14-60 J14-61 J14-62 J14-63 J14-64 1.4.6 P6 (SATA0) NOTE Availability of signals at this connector depends on the build option selected on the IMP3A. Use a right‐angled SATA cable to remain within the allowable height limit. Table 1-10 P6 Pin Assignments Signal SATA0_TX+ SATA0_TX- SATA0_RX- SATA0_RX+ 10 CPCI3UX606 Publication No. CPCI3UX606-HRM/1... -
Page 11: P7 (Sata1)
Table 1-11 P6 Pin Assignments Signal SATA1_TX+ SATA1_TX- SATA1_RX- SATA1_RX+ 1.4.8 P8 (COM1) See the P2 description for more details on COM1. Table 1-12 P8 Pin Assignments Signal Pin Signal No connection No connection COM1_RXD (RXD_A) COM1_CTS (RXD_B) COM1_TXD (TXD_A) COM1_RTS (TXD_B) No connection No connection Publication No. CPCI3UX606-HRM/1 CPCI3UX606 11... -
Page 12: P9 And P10 (Eth1/Gpio/Com1 Options)
Table 1-14 P10 Pin Assignments Signal Pin Signal ETH1_3- COM1_RTS 4 ETH1_3-_GPIO11_COM1_RTS GPIO11 1.4.10 J3 (10/100/1000BaseT Ethernet Channel 0) Gigabit operation depends on availability of the required signals, which is an IMP3A build option (see also P1). 10/100 signals are given in parentheses. Table 1-15 J3 Pin Assignments Signal ETH0_0+ (TX+) ETH0_0- (TX-) ETH0_1+ (RX+) ETH0_2+ ETH0_2- ETH0_1- (RX-) ETH0_3+ ETH0_3- 12 CPCI3UX606 Publication No. CPCI3UX606-HRM/1... -
Page 13: J4 (10/100/1000Baset Ethernet Channel 1)
ETH1_2+ ETH1_2- ETH1_1- (RX-) ETH1_3+ ETH1_3- 1.4.12 J5 (USB) NOTE Availability of signals at this connector depends on the build option selected on the IMP3A. Table 1-17 J5 Pin Assignments Signal USB_PWR USB_D- USB_D+ The IMP3A provides USB_PWR when a USB build option is selected. Publication No. CPCI3UX606-HRM/1 CPCI3UX606 13... - Page 14 Figure 1-4 CPCI3UX606 with Front Panel Figure 1-5 CPCI3UX606 in Rear Guide Rails (per IEEE1101.11) 14 CPCI3UX606 Publication No. CPCI3UX606-HRM/1...
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