Interrupt Of 16-Bit Reload Timer; Table 10-7 Interrupt Control Bits And Interrupt Factors Of 16-Bit Reload Timer - Fujitsu MB90420/5 (A) Series Hardware Manual

F2mc-16lx family 16-bit microcontrollers
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10.5 Interrupt of 16-bit Reload Timer

The 16-bit reload timer can issue an interrupt request by a counter underflow. Also, the 16-bit reload timer is
2
conforms to the EI
OS.
n Interrupt of 16-bit reload timer
The interrupt control bits and interrupt factors of the 16-bit reload timer are shown in Table 10-7.

Table 10-7 Interrupt Control Bits and Interrupt Factors of 16-bit Reload Timer

Interrupt-request flag bit
Interrupt-request enable bit
Interrupt factor
By an underflow of decrement counter (0000
(TMCSR0/1L, TMCSR0/1H) is set to "1". At this point, when the interrupt request is already enabled
(TMCSR0/1: INTE = 1), interrupt request is output to the interrupt controller.
n 16-bit reload timer interrupt and EI
Table 10-8 shows the 16-bit reload timer interrupt and the EI
Channel
16-bit reload timer 0
16-bit reload timer 1
∆: Can be used when interrupt factor sharing ICR03, ICR09 or interrupt vector are not used.
2
n EI
OS Function of 16-bit reload timer
The 16-bit reload timer has a circuit corresponding to EI
2
However, the EI
OS can only be used when other resource that shares the interrupt control register (ICR)
does not use the interrupt. For example, when using the EI
16-bit watch timer must be disabled.
16-BIT RELOAD TIMER
TMCSR0/1: UF
TMCSR0/1: INTE
Underflow of 16-bit decrement counter (TMR0/1)
2
OS
Table 10-8 16-bit Reload Timer Interrupt and EI
Interrupt Control Register
Interrupt
Register
No.
Name
#17 (11
)
ICR03
H
#28 (1C
)
ICR08
H
16-bit Reload Timer
→ FFFF
), the UF bit of the timer control status register
H
H
2
OS.
Address
Lower
0000B3
FFFFB8
H
0000B8
FFFF8C
H
2
OS. So, a counter underflow can start the EI
2
OS by 16-bit reload timer 0, the interrupt of the
10-15
2
OS
Address of Vector Table
Upper
Bank
FFFFB9
FFFFBA
H
H
FFFF8D
FFFF8E
H
H
2
EI
OS
H
H
2
OS.
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