Table of Contents
System/CPU Overview
CPU
MEMORY
Stack Registers
Stack and Array Area
I
DL Register
1
...
T
I
..
•
Own
•
Array
•
Area
•
•
•
•
•
II
I
I
DB Register
I
/
Base
of
•
Stack
•
•
•
•
•
•
•
Filled
•
I
a
Register
1
...
I
•
•
•
•
•
t
I
1
SM Register
...
I
•
•
•
Top
•
of
•
Stack
•
Increasing
Addresses
~
Avail-
•
able
•
•
•
•
•
•
I
Z Register
I
...
I
90020-35
Figure 2-9.
CPU Registers and Stack Basic Operations
the
logical T08
is in the third CPU register and is
defined by
the S-pointer (8).
The four TOS
registers are reserved for
the
four
topmost words
of
the
stack and are employed
only by CPU
hardware.
The T08
registers
cannct
be
addressed
externally.
Externally,
the programmer is interested only
in location Sand
and the hardware defines this address for him.
Using figure 2-10
2-23
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Troubleshooting
