Emerson Motorola MVME162 User Manual
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Emerson Motorola MVME162 User Manual

Emerson Motorola MVME162 User Manual

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  • Page 1 (217) 352-9330 | Click HERE Find the Emerson / Motorola MVME162PA-344SE at our website:...
  • Page 2 MVME162 Embedded Controller User’s Manual (MVME162/D2)
  • Page 3 Notice While reasonable efforts have been made to assure the accuracy of this document, Motorola, Inc. assumes no liability resulting from any omissions in this document, or from the use of the information obtained therein. Motorola reserves the right to revise this document and to make changes from time to time in the content hereof without obligation of Motorola to notify any person of such revision or changes.
  • Page 4 Preface The MVME162 User’s Manual provides general information, hardware preparation and installation instructions, operating instructions, and a functional description for the MVME162 Embedded Controller. This manual is intended for anyone who wants to design OEM systems, supply additional capability to an existing compatible system, or work in a lab environment for experimental purposes.
  • Page 5 The computer programs stored in the Read Only Memory of this device contain material copyrighted by Motorola Inc., first published 1990, and may be used only under a license such as the License for Computer Programs (Article 14) contained in Motorola’s Terms and Conditions of Sale, Rev.
  • Page 6 Safety Summary Safety Depends On You The following general safety precautions must be observed during all phases of operation, service, and repair of this equipment. Failure to comply with these precautions or with specific warnings elsewhere in this manual violates safety standards of design, manufacture, and intended use of the equipment. Motorola, Inc.

  • Page 8: Table Of Contents

    Contents CHAPTER 1 GENERAL INFORMATION Introduction ......................1-1 Models ........................1-1 Features........................1-2 Specifications ......................1-3 Cooling Requirements..................1-4 Special Considerations for Elevated Temperature Operation ....1-4 FCC Compliance ....................1-5 General Description ....................1-6 Input/Output ....................1-6 VMEbus Interface ....................1-7 No-VMEbus-Interface Option................1-7 MCchip ......................1-7 Flash Memory and EPROM................1-7 IndustryPack Modules ..................1-8 Optional SCSI Interface...................1-8 Optional LAN Ethernet Transceiver Interface ..........1-8...
  • Page 9 CHAPTER 2 HARDWARE PREPARATION AND INSTALLATION Introduction .........................2-1 Unpacking Instructions....................2-1 Hardware Preparation ....................2-1 SIM Selection ......................2-2 Removal of Existing SIM ................2-4 Installation of New SIM ................2-5 System Controller Select Header (J1)..............2-5 Synchronous Clock Select Header (J11) for Serial Port 1/Console ....2-6 Clock Select Header (J12) for Serial Port 2 ............2-6 SRAM Battery Backup Source Select Header (J20) .........2-7 EPROM Size Select Header (J21) ...............2-7...
  • Page 10 CHAPTER 4 FUNCTIONAL DESCRIPTION Introduction ........................ 4-1 MVME162 Functional Description ................4-1 Data Bus Structure ....................4-1 MC68040/MC68LC040 MPU ................4-2 EPROM and Flash Memory................4-2 SRAM........................4-2 About the Battery..................4-3 Onboard DRAM ....................4-4 Battery Backed Up RAM and Clock..............4-5 VMEbus Interface and VMEchip2 ..............
  • Page 12 List of Figures Figure 2-1. MVME162 Switch, Header, Connector, Fuse, and LED Locations ................2-3 Figure 2-2. Serial Interface Module, Connector Side .........2-4 Figure 2-3. MVME162/MVME712M EIA-232-D Connection Diagram ..2-14 Figure 2-4. MVME162/MVME712x EIA-232-D Connection Diagram ..2-20 Figure 2-5. MVME162 EIA-530 Connection Diagram........2-24 Figure 4-1.
  • Page 14 List of Tables Table 1-1. MVME162 Models.................1-1 Table 1-2. MVME162 Specifications..............1-3 Table 2-1. Serial Interface Module Part Numbers..........2-4 Table 3-1. Local Bus Memory Map ...............3-4 Table 3-2. Local I/O Devices Memory Map ............3-5 Table 3-3. VMEchip2 Memory Map..............3-8 Table 3-4. MCchip Register Map .................3-14 Table 3-5.

  • Page 16: General Information

    GENERAL INFORMATION Introduction This manual provides general information, hardware preparation and installation instructions, operating instructions, and a functional description of the MVME162 Embedded Controller (referred to as the MVME162 throughout this manual). Models The MVME162 is available in several models, which are listed in Table 1-1. Table 1-1.

  • Page 17: Features

    General Information Features Features of the MVME162 include: 25MHz 32-bit Microprocessor: either an MC68LC040 Enhanced 32-bit Microprocessor with 8KB of cache and MMU, or an optional 25MHz MC68040 32-bit Microprocessor with 8KB of cache, MMU, and FPU 1MB, 4MB, or 8MB of shared Dynamic Random Access Memory (DRAM) with programmable parity 512KB of Static Random Access Memory (SRAM) with battery backup One JEDEC standard 32-pin PLCC EPROM socket (EPROMs may be...

  • Page 18: Specifications

    Specifications – VMEbus interrupt handler – Global CSR for interprocessor communications – DMA for fast local memory-VMEbus transfers (A16/A24/A32, D16/D32[D16/D32/D64BLT]) Switches and Light-Emitting Diodes (LEDs) – Two pushbutton switches ( ABORT RESET – Eight LEDs ( , and FAIL STAT SCON FUSE SCSI...

  • Page 19: Cooling Requirements

    General Information Cooling Requirements The Motorola MVME162 Embedded Controller is specified, designed, and tested to operate reliably with an incoming air temperature range from 0° to 55° C (32° to 131° F) with forced air cooling at a velocity typically achievable by using a 100 CFM axial fan.

  • Page 20: Fcc Compliance

    Specifications between the MVME162 and the IP-Dual P/T module. Under these conditions, a 10° C rise between the inlet and exit air was observed. At 70° C exit air temperature (60° C inlet air), the junction temperatures of devices on the MVME162 were calculated (from the measured case temperatures) and did not exceed 100°...

  • Page 21: General Description

    General Information General Description The MVME162 is a double-high VMEmodule equipped with an MC68LC040 or optional MC68040 microprocessor. (The MC68040 microprocessor has a floating-point coprocessor; the MC68LC040 does not.) The MVME162 has 1MB, 4MB, or 8MB of parity-protected DRAM; 512KB SRAM (with battery backup);...

  • Page 22: Vmebus Interface

    General Description VMEbus Interface The optional VMEchip2 ASIC is the VMEbus interface for the MVME162. (This option is a factory build and cannot be added in the field.) VMEchip2 features include: Two programmable 32-bit tick timers A programmable watchdog timer Programmable map decoders for the master and slave interfaces A VMEbus to/from local bus DMA controller A VMEbus to/from local bus non-DMA programmed access interface...

  • Page 23: Industrypack Modules

    General Information 256 Kbit x 8; 512 Kbit x 8; 1 Mbit x 8) organized as a 512Kbit x 8 device. A jumper allows reset code to be fetched either from Flash memory or from the EPROM. IndustryPack Modules Up to four IndustryPack (IP) modules may be installed on the MVME162. The interface between the IPs and MVME162 is the IndustryPack Interface Controller (IPIC) ASIC.

  • Page 24: Mvme712 Series Transition Modules

    Required Equipment test at power-up feature which verifies the integrity of the system. Various 162Bug routines that handle I/O, data conversion, and string functions are available to user programs through the TRAP #15 system calls. MVME162Bug occupies the first half (512KB) of Flash memory.

  • Page 25: Related Documentation

    General Information Related Documentation The following publications are applicable to the MVME162 and may provide additional helpful information. If not shipped with this product, they may be purchased by contacting your local Motorola sales office. Non-Motorola documents may be purchased from the sources listed. Motorola Document Title Publication...

  • Page 26: Support Information

    Support Information The following publications are available from the sources indicated. Versatile Backplane Bus: VMEbus, ANSI/IEEE Std 1014-1987, The Institute of Electrical and Electronics Engineers, Inc., 345 East 47th Street, New York, NY 10017 (VMEbus Specification). This is also available as Microprocessor system bus for 1 to 4 byte data, IEC 821 BUS, Bureau Central de la Commission Electrotechnique Internationale;...

  • Page 27: Manual Terminology

    General Information Manual Terminology Throughout this manual, a convention is used which precedes data and address parameters by a character identifying the numeric format as follows: dollar specifies a hexadecimal character percent specifies a binary number & ampersand specifies a decimal number Unless otherwise specified, all address references are in hexadecimal.

  • Page 28: Hardware Preparation And Installation

    HARDWARE PREPARATION AND INSTALLATION Introduction This chapter provides unpacking instructions, hardware preparation guidelines, and installation instructions for the MVME162 Embedded Controller. Hardware preparation for the MVME712 series transition modules is described in separate manuals; refer to the Related Documentation section in Chapter 1. Unpacking Instructions If the shipping carton is damaged upon receipt, request that the carrier’s agent be present during the unpacking and...

  • Page 29: Sim Selection

    Hardware Preparation and Installation Figure 2-1 illustrates the placement of the switches, jumper headers, connectors, and LED indicators on the MVME162. Manually configurable items include: SIM selection for serial port B configuration (J10) System controller selection (J1) Synchronous clock selection (J11) for Serial Port 1/Console Synchronous clock selection (J12) for Serial Port 2 SRAM backup power source selection (J20) EPROM size selection (J21)

  • Page 30: Figure 2-1. Mvme162 Switch, Header, Connector, Fuse, And Led Locations

    Hardware Preparation MVME 162-XX FAIL STAT RUN SCON FUSE SCSI VME ABORT RESET Figure 2-1. MVME162 Switch, Header, Connector, Fuse, and LED Locations MVME162/D2...

  • Page 31: Removal Of Existing Sim

    Hardware Preparation and Installation Table 2-1. Serial Interface Module Part Numbers Model Configuration Part Number Standard Number EIA-232-D 01-W3846B SIM05 01-W3865B SIM06 EIA-530 01-W3868B SIM07 01-W3867B SIM08 SECONDARY SIDE 10922.00 9403 (2-2) Figure 2-2. Serial Interface Module, Connector Side Removal of Existing SIM Each serial interface module is retained by two 4-40 x ”...

  • Page 32: Installation Of New Sim

    Hardware Preparation Installation of New SIM Observe the orientation of the connector keys on SIM connector J1 and MVME162 connector J10. Turn the SIM so that the keys line up and place it gently on connector J10, aligning the mounting holes at the SIM corners with the matching standoffs on the MVME162.

  • Page 33: Synchronous Clock Select Header (J11) For Serial Port 1/Console

    Hardware Preparation and Installation Synchronous Clock Select Header (J11) for Serial Port 1/Console The MVME162 is shipped from the factory with the SERIAL PORT 1/CONSOLE header configured for asynchronous communications (i.e., jumpers removed). To select synchronous communications for the SERIAL PORT 1/CONSOLE connection, install jumpers across pins 1 and 2 and pins 3 and 4.

  • Page 34: Sram Battery Backup Source Select Header (J20)

    Hardware Preparation SRAM Battery Backup Source Select Header (J20) The MVME162 is factory-configured to use VMEbus +5V standby power as a backup power source for the SRAM (i.e., jumpers are installed across pins 1 and 3 and 2 and 4). To select the onboard battery as the backup power source, install the jumpers across pins 3 and 5 and 4 and 6.

  • Page 35: General-Purpose Readable Jumpers Header (J22)

    Hardware Preparation and Installation General-Purpose Readable Jumpers Header (J22) Header J22 provides eight readable jumpers. These jumpers can be read as a register (at $FFF4202D) in the MCchip LCSR (local control/status register). The bit values are read as a zero when the jumper is installed, and as a one when the jumper is removed.

  • Page 36: Installation Instructions

    Installation Instructions Installation Instructions The following sections discuss the installation of IndustryPacks (IPs) on the MVME162, the installation of the MVME162 into a VME chassis, and the system considerations relevant to the installation. Before installing IndustryPacks, ensure that the serial ports and all header jumpers are configured as desired.

  • Page 37: Mvme162 Module Installation

    Hardware Preparation and Installation MVME162 Module Installation With EPROM and IndustryPacks installed and headers properly configured, proceed as follows to install the MVME162 in the VME chassis: Turn all equipment power OFF and disconnect the power cable from the AC power source. Inserting or removing modules while power is applied aution could result in damage to module components.
  • Page 38 Installation Instructions Connect the P2 Adapter Board or LCP2 Adapter Board and cable(s) to MVME162 backplane connector P2. This provides a connection point for terminals or other peripherals at the EIA-232-D serial ports, SCSI ports, and LAN Ethernet port. For information on installing the P2 or LCP2 Adapter Board and the MVME712 series transition module(s), refer to the manuals listed in Related Documentation in Chapter 1 (the MVME162 Embedded Controller Programmer’s Reference Guide provides some connection diagrams).

  • Page 39: System Considerations

    Hardware Preparation and Installation System Considerations The MVME162 draws power from VMEbus backplane connectors P1 and P2. P2 is also used for the upper 16 bits of data in 32-bit transfers, and for the upper 8 address lines in extended addressing mode. The MVME162 may not function properly without its main board connected to VMEbus backplane connectors P1 and P2.
  • Page 40 Installation Instructions The MVME162 provides +5 Vdc power to the remote LED/switch connector (J4) through a 1A fuse (F1) located near J4. Connector J4 is the interface for a remote control and indicator panel. If none of the LEDs light and the ABORT switches do not operate, check fuse F1.

  • Page 41: Figure 2-3. Mvme162/Mvme712M Eia-232-D Connection Diagram

    Hardware Preparation and Installation 712M TRANSITION MODULE PORT 2 DB25 TO MODEM P2-C27 TXD2 PIN 2 P2-C28 RXD2 PIN 3 P2-C29 RTS2 PIN 4 P2-C30 CTS2 PIN 5 P2-C31 DTR2 PIN 20 P2-C32 DCD2 PIN 8 PIN 6 CABLE PIN 15 TO TERMINAL PIN 17 TXCO...
  • Page 42 Installation Instructions 712M TRANSITION MODULE PORT 2 DB25 TO MODEM P2-C27 TXD2 PIN 2 P2-C28 RXD2 PIN 3 P2-C29 RTS2 PIN 4 P2-C30 CTS2 PIN 5 P2-C31 DTR2 PIN 20 P2-C32 DCD2 PIN 8 PIN 6 CABLE PIN 15 TO TERMINAL PIN 17 TXCO PIN 24...
  • Page 43 Hardware Preparation and Installation 712M TRANSITION MODULE PORT 4 TO MODEM DB25 P2-A25 TXD4 PIN 2 P2-A26 RXD4 PIN 3 P2-A27 RTS4 PIN 4 P2-A29 CTS4 PIN 5 P2-A30 DTR4 PIN 20 P2-A31 DCD4 PIN 8 PIN 6 RTXC P2-A32 RTXC4 PIN 15 TRXC...
  • Page 44 Installation Instructions 712M TRANSITION MODULE PORT 4 TO MODEM DB25 P2-A25 TXD4 PIN 2 P2-A26 RXD4 PIN 3 P2-A27 RTS4 PIN 4 P2-A29 CTS4 PIN 5 P2-A30 DTR4 PIN 20 P2-A31 DCD4 PIN 8 PIN 6 RTXC P2-A32 RTXC4 PIN 15 TRXC P2-A28 TRXC4...
  • Page 45 Hardware Preparation and Installation 712M TRANSITION MODULE PORT 4 DB25 TO MODEM P2-A25 TXD4 PIN 2 P2-A26 RXD4 PIN 3 P2-A27 RTS4 PIN 4 P2-A29 CTS4 PIN 5 P2-A30 DTR4 PIN 20 P2-A31 DCD4 PIN 8 PIN 6 RTXC P2-A32 RTXC4 PIN 15 TO TERMINAL...
  • Page 46 Installation Instructions 712M TRANSITION MODULE PORT 4 DB25 TO MODEM P2-A25 TXD4 PIN 2 P2-A26 RXD4 PIN 3 P2-A27 RTS4 PIN 4 P2-A29 CTS4 PIN 5 P2-A30 DTR4 PIN 20 P2-A31 DCD4 PIN 8 PIN 6 RTXC P2-A32 RTXC4 PIN 15 TO TERMINAL TRXC P2-A28...

  • Page 47: Figure 2-4. Mvme162/Mvme712X Eia-232-D Connection Diagram

    Hardware Preparation and Installation 712A/AM/12/13 TRANSITION MODULE PORT 2 1.5K 1.5K +12V SERIAL PORT 2 P2-C27 TXD2 PIN 3 P2-C28 RXD2 PIN 2 P2-C29 RTS2 PIN 7 P2-C30 CTS2 PIN 8 P2-C31 DTR2 PIN 4 P2-C32 DCD2 PIN 1 PIN 6 CABLE MODEM PORT 2 MTXD...
  • Page 48 Installation Instructions 712AM/13 TRANSITION MODULE PORT 2 1.5K 1.5K +12V SERIAL PORT 2 P2-C27 TXD2 PIN 3 P2-C28 RXD2 PIN 2 P2-C29 RTS2 PIN 7 P2-C30 CTS2 PIN 8 P2-C31 DTR2 PIN 4 P2-C32 DCD2 PIN 1 PIN 6 CABLE MODEM PORT 2 MTXD RJ11...
  • Page 49 Hardware Preparation and Installation 712A/AM/-12/-13 TRANSITION MODULE PORT 4 1.5K 1.5K +12V P2-A25 TXD4 PIN 3 P2-A26 RXD4 PIN 2 P2-A27 RTS4 PIN 7 P2-A29 CTS4 PIN 8 P2-A30 DTR4 PIN 4 P2-A31 DCD4 PIN 1 PIN 6 P2-A32 RTXC4 P2-A28 TRXC4 CABLE...
  • Page 50 Installation Instructions 712A/AM/-12/-13 TRANSITION MODULE PORT 4 1.5K 1.5K +12V P2-A25 TXD4 PIN 3 P2-A26 RXD4 PIN 2 P2-A27 RTS4 PIN 7 P2-A29 CTS4 PIN 8 P2-A30 DTR4 PIN 4 P2-A31 DCD4 PIN 1 PIN 6 P2-A32 RTXC4 P2-A28 TRXC4 CABLE MVME 712A/AM/-12/-13 PORT 4 (DTE) NOTES:...

  • Page 51: Figure 2-5. Mvme162 Eia-530 Connection Diagram

    Hardware Preparation and Installation P2 CONNECTOR TXD_B P2-C18 TXD_A P2-A25 RXD_B P2-A19 RXD_A P2-A26 RTS_B P2-C19 RTS_A P2-A27 CTS_B P2-C26 CTS_A P2-A29 DTR_B P2-A23 DTR_A P2-A30 DCD_B P2-C22 DCD_A P2-A31 DSR_B P2-A22 DSR_A P2-A20 MVME 162 EIA-530 DTE CONFIGURATION TXC_B P2-C24 (TO MODEM) TXC_A...
  • Page 52 Installation Instructions P2 CONNECTOR TXD_B P2-C18 TXD_A P2-A25 RXD_B P2-A19 RXD_A P2-A26 RTS_B P2-C19 RTS_A P2-A27 CTS_B P2-C26 CTS_A P2-A29 DTR_B P2-A23 DTR_A P2-A30 DCD_B P2-C22 DCD_A P2-A31 DSR_B P2-A22 MVME 162 EIA-530 DCE CONFIGURATION DSR_A P2-A20 (TO TERMINAL) TXC_B P2-C24 TXC_A P2-A32...
  • Page 53 Hardware Preparation and Installation 2-26 MVME162 Embedded Controller User’s Manual...

  • Page 54: Operating Instructions

    OPERATING INSTRUCTIONS Introduction This chapter provides information necessary to use the MVME162 in a system configuration. This includes a description of the switches and LEDs, memory maps, and software initialization of the module. Switches and LEDs The MVME162 front panel has switches and eight LED ABORT RESET...

  • Page 55: Front Panel Indicators (Ds1 - Ds4)

    Operating Instructions system controller. A local reset may be generated by the switch, a RESET power-up reset, a watchdog timeout, a VMEbus *, or a control bit in SYSRESET the GCSR. For an MVME162 without the VMEbus option (i.e., with no VMEchip2), the LCSR control bit is not available to reset the module.

  • Page 56: Memory Maps

    Memory Maps Memory Maps There are two points of view for memory maps: The mapping of all resources as viewed by local bus masters (local bus memory map) The mapping of onboard resources as viewed by VMEbus masters (VMEbus memory map) Local Bus Memory Map The local bus memory map is split into different address spaces by the Transfer Type (TT) signals.

  • Page 57: Table 3-1. Local Bus Memory Map

    Operating Instructions Table 3-1. Local Bus Memory Map Software Address Range Devices Accessed Port Width Size Cache Notes Inhibit Programmable DRAM on Board 1MB-8MB Programmable 128KB-2MB SRAM Programmable VMEbus A32/A24 D32/D16 Programmable IP_a Memory D32-D8 64 KB-8 MB 2, 4 Programmable IP_b Memory D32-D8...

  • Page 58: Table 3-2. Local I/O Devices Memory Map

    Memory Maps 5. The EPROM and Flash are sized by the MCchip ASIC from an 8-bit private bus to the 32-bit MPU local bus. Because the device size is less than the allocated memory map for some entries, the device contents repeat for those entries. If jumper GPIO3 is installed, the Flash device is accessed.
  • Page 59 Operating Instructions Table 3-2. Local I/O Devices Memory Map (Continued) Address Range Devices Accessed Port Width Size Notes $FFF58280 - $FFF582FF IPIC IP_c ID 128 B $FFF58300 - $FFF5837F IPIC IP_d I/O 128 B $FFF58380 - $FFF583FF IPIC IP_d ID Read 128 B $FFF58400 - $FFF584FF IPIC IP_ab I/O...

  • Page 60: Detailed I/O Memory Maps

    Memory Maps 3. Writes to the LCSR in the VMEchip2 must be 32 bits. LCSR writes of 8 or 16 bits terminate with a TEA signal. Writes to the GCSR may be 8, 16 or 32 bits. Reads to the LCSR and GCSR may be 8, 16 or 32 bits.

  • Page 61: Table 3-3. Vmechip2 Memory Map

    Operating Instructions Table 3-3. VMEchip2 Memory Map (Sheet 1 of 3) VMEchip2 LCSR Base Address = $FFF40000 OFFSET: SLAVE ENDING ADDRESS 1 SLAVE ENDING ADDRESS 2 SLAVE ADDRESS TRANSLATION ADDRESS 1 SLAVE ADDRESS TRANSLATION ADDRESS 2 ADDER PRGM DATA MASTER ENDING ADDRESS 1 MASTER ENDING ADDRESS 2 MASTER ENDING ADDRESS 3 MASTER ENDING ADDRESS 4...
  • Page 62 Memory Maps SLAVE STARTING ADDRESS 1 SLAVE STARTING ADDRESS 2 SLAVE ADDRESS TRANSLATION SELECT 1 SLAVE ADDRESS TRANSLATION SELECT 2 ADDER PRGM DATA MASTER STARTING ADDRESS 1 MASTER STARTING ADDRESS 2 MASTER STARTING ADDRESS 3 MASTER STARTING ADDRESS 4 MASTER ADDRESS TRANSLATION SELECT 4 MAST MAST MAST...
  • Page 63 Operating Instructions Table 3-3. VMEchip2 Memory Map (Sheet 2 of 3) VMEchip2 LCSR Base Address = $FFF40000 OFFSET: BGTO GLOBAL TIME OFF TIME ON TIMER TICK TIMER 1 TICK TIMER 1 TICK TIMER 2 TICK TIMER 2 SCON PURS FAIL FAIL STAT PURS...
  • Page 64 Memory Maps LOCAL PRESCALER ACCESS TIME OUT CLOCK ADJUST TIMER TIMER SELECT COMPARE REGISTER COUNTER COMPARE REGISTER COUNTER OVERFLOW OVERFLOW COUNTER 2 COUNTER 1 SCALER SPARE IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 IRQ2 IRQ1 P ERROR IRQ1E TIC TIMER 2 TIC TIMER 1 IRQ LEVEL IRQ LEVEL IRQ LEVEL...
  • Page 65 Operating Instructions This page intentionally left blank. 3-12 User’s Manual...
  • Page 66 Memory Maps Table 3-3. VMEchip2 Memory Map (Sheet 3 of 3) VMEchip2 GCSR Base Address = $FFF40100 Offsets VME- Local CHIP REVISION CHIP ID SIG3 SIG2 SIG1 SIG0 SCON SYSFL GENERAL PURPOSE CONTROL AND STATUS REGISTER 0 GENERAL PURPOSE CONTROL AND STATUS REGISTER 1 GENERAL PURPOSE CONTROL AND STATUS REGISTER 2 GENERAL PURPOSE CONTROL AND STATUS REGISTER 3 GENERAL PURPOSE CONTROL AND STATUS REGISTER 4...

  • Page 67: Table 3-4. Mcchip Register Map

    Operating Instructions Table 3-4. MCchip Register Map MCchip Base Address = $FFF42000 Offset D31-D24 D23-D16 D15-D8 D7-D0 MCchip ID MCchip Revision General Control Interrupt Vector Base Register Tick Timer 1 Compare Register Tick Timer 1 Counter Register Tick Timer 2 Compare Register Tick Timer 2 Counter Register LSB Prescaler Prescaler Clock...

  • Page 68: Table 3-5. Z85230 Scc Register Addresses

    Memory Maps Table 3-5. Z85230 SCC Register Addresses SCC Register Address Port B Control $FFF45001 Port B Data $FFF45003 SCC #1 Port A Control $FFF45005 Port A Data $FFF45007 Port B Control $FFF45801 Port B Data $FFF45803 SCC #2 Port A Control $FFF45805 Port A Data $FFF45807...

  • Page 69: Table 3-7. 53C710 Scsi Memory Map

    Operating Instructions Table 3-7. 53C710 SCSI Memory Map 53C710 Register Address Map Base Address is $FFF47000 SCRIPTs and Big Endian Little Endian Mode Mode SIEN SDID SCNTL1 SCNTL0 SOCL SODL SXFER SCID SBCL SBDL SIDL SFBR SSTAT2 SSTAT1 SSTAT0 DSTAT CTEST3 CTEST2 CTEST1...

  • Page 70: Ipic Overall Memory Map

    Memory Maps IPIC Overall Memory Map The following memory map table includes all devices selected by the IPIC map decoder. Table 3-8. IPIC Overall Memory Map Address Range Selected Device Port Width Size Programmable IP_a/IP_ab Memory Space D32-D8 64 KB-16 MB Programmable IP_b Memory Space D16-D8...

  • Page 71: Table 3-9. Ipic Memory Map-Control And Status Registers

    Operating Instructions Table 3-9 contains a summary of the IPIC CSR registers. The CSR registers can be accessed as bytes, words, or longwords; they should not be accessed as lines. They are shown in the table as bytes. Table 3-9. IPIC Memory Map—Control and Status Registers IPIC Base Address = $FFFBC000 Register Bit Names Register...

  • Page 72: Table 3-10. Mk48T08 Bbram/Tod Clock Memory Map

    Memory Maps Table 3-9. IPIC Memory Map—Control and Status Registers (Continued) IPIC Base Address = $FFFBC000 Register Bit Names Register Register Offset Name IP_b GENERAL c_ERR c_RT1 c_RT0 c_WIDTH1 c_WIDTH0 c_MEN CONTROL IP_b GENERAL d_ERR d_RT1 d_RT0 d_WIDTH1 d_WIDTH0 d_MEN CONTROL RESERVED RESERVED...

  • Page 73: Table 3-12. Tod Clock Memory Map

    Operating Instructions Table 3-11. BBRAM Configuration Area Memory Map (Continued) Address Range Description Size (Bytes) $FFFC1F3E - $FFFC1F45 Memory Mezzanine Serial Number $FFFC1F46 - $FFFC1F4D Serial Port 2 Personality PWB $FFFC1F4E - $FFFC1F55 Serial Port 2 Personality Serial No. $FFFC1F56 - $FFFC1F5D IP_a Board ID $FFFC1F5E - $FFFC1F65 IP_a Board Serial Number...

  • Page 74: Bbram, Tod Clock Memory Map

    Memory Maps BBRAM, TOD Clock Memory Map The MK48T08 BBRAM (also called Non-Volatile RAM or NVRAM) is divided into six areas as shown in Table 3-10. The first five areas are defined by software, while the sixth area, the time-of-day (TOD) clock, is defined by the chip hardware.
  • Page 75 Operating Instructions The fields are defined as follows: Four bytes are reserved for the revision or version of this structure. This revision is stored in ASCII format, with the first two bytes being the major version numbers and the last two bytes being the minor version numbers. For example, if the version of this structure is 1.0, this field contains: 0100 Twelve bytes are reserved for the serial number of the board in ASCII...
  • Page 76 Memory Maps 11. Eight bytes are reserved for the printed wiring board (PWB) number assigned to the serial port 2 personality board in ASCII format. 12. Eight bytes are reserved for the serial number assigned to the serial port 2 personality board in ASCII format.

  • Page 77: Interrupt Acknowledge Map

    Operating Instructions Interrupt Acknowledge Map The local bus distinguishes interrupt acknowledge cycles from other cycles by placing the binary value %11 on TT1-TT0. It also specifies the level that is being acknowledged using TM2-TM0. The interrupt handler selects which device within that level is being acknowledged. VMEbus Memory Map This section describes the mapping of local resources as viewed by VMEbus masters.

  • Page 78: Local Reset Operation

    Software Initialization Local Reset Operation Local reset (LRST) is a subset of system reset (SRST). Local reset can be generated five ways: Expiration of the watchdog timer Pressing the front panel switch (if the system controller function is RESET disabled) By asserting a bit in the board control register in the GCSR By SYSRESET* By powerup reset.
  • Page 79 Operating Instructions 3-26 User’s Manual...

  • Page 80: Functional Description

    FUNCTIONAL DESCRIPTION Introduction This chapter describes the MVME162 Embedded Controller on a block diagram level. The Functional Description provides an overview of the MVME162, followed by a detailed description of several blocks of MVME162 circuitry. Figure 4-1 shows a block diagram of the MVME162 main module. Figure 4-2 shows a block diagram of the parity DRAM mezzanine module.

  • Page 81: Mc68040/Mc68Lc040 Mpu

    Functional Description MC68040/MC68LC040 MPU The MVME162 is equipped with an MC68040 or MC68LC040 microprocessor. The MC68040/MC68LC040 have on-chip instruction and data caches; the MC68040 also provides a floating-point coprocessor. Refer to the M68040 Microprocessor User’s Manual for more information. EPROM and Flash Memory The MVME162 implementation includes four 2-Mbit Flash devices organized in a 256Kbit x 8 configuration.

  • Page 82: About The Battery

    MVME162 Functional Description For proper operation of the onboard SRAM, some jumper aution combination must be installed on the Backup Power Source Select Header. If one of the jumpers is used to select the battery, the battery must be installed on the MVME162. The SRAM may malfunction if inputs to the DS1210S are left unconnected.

  • Page 83: Onboard Dram

    Functional Description Lithium batteries incorporate flammable materials such as aution lithium and organic solvents. If lithium batteries are mis- treated or handled incorrectly, they may burst open and ignite, possible resulting in injury and/or fire. When dealing with lithium batteries, carefully follow the precautions listed below in order to prevent accidents.

  • Page 84: Battery Backed Up Ram And Clock

    MVME162 Functional Description Battery Backed Up RAM and Clock An MK48T08 RAM and clock chip is used on the MVME162. This chip provides a time-of-day clock, oscillator, crystal, power fail detection, memory write protection, 8KB of RAM, and a battery in one 28-pin package. The clock provides seconds, minutes, hours, day, date, month, and year in BCD 24-hour format.
  • Page 85 Functional Description The Z85230 supplies an interrupt vector during interrupt acknowledge cycles. The vector is modified within the Z85230 according to the interrupt source. Interrupt request levels are programmed via the MCchip. Refer to the Z85230 data sheet listed in Chapter 1 and to the MCchip Programming Model in the MVME162 Embedded Controller Programmer’s Reference Guide for further information.
  • Page 86 MVME162 Functional Description Port B is routed (via the module at J10) to the 25-pin DB25 connector marked on the MVME162 front panel. Port B is also routed to a DB9 (on SERIAL PORT 2 the MVME712x) or DB25 (on the MVME712M) connector on the MVME712 series transition module.

  • Page 87: Industrypack (Ip) Interfaces

    Functional Description Do not connect serial data devices to the equivalent ports on aution the MVME712 series transition module and the MVME162 front panel at the same time. This could result in simul- taneous transmission of conflicting data. Do not connect peripheral devices to Port 1, Port 3, or the Centronics printer port on the MVME712 series transition module.

  • Page 88: Scsi Interface

    MVME162 Functional Description If the data in the BBRAM is lost, use the number on the label on backplane connector P2 to restore it. The Ethernet transceiver interface is located on the MVME162 main module. An industry-standard DB15 connector is located on the MVME712 series transition module.

  • Page 89: Programmable Tick Timers

    Functional Description Programmable Tick Timers Four 32-bit programmable tick timers with 1 µs resolution are provided in the MCchip and two 32-bit programmable tick timers are provided in the optional VMEchip2. The tick timers can be programmed to generate periodic interrupts to the processor.

  • Page 90: Local Bus To Dram Cycle Times

    MVME162 Functional Description Local Bus to DRAM Cycle Times The DRAM base address, array size, and device size are programmable. The DRAM controller assumes an interleaved architecture if the DRAM size requires eight physical devices (that is, when memory array size is 4MB and DRAM technology is 4 Mbits per device;...

  • Page 91: Lan Dma Transfers

    Functional Description This reduces local bus usage by the SCSI device. Refer to the MCchip Programming Model in the MVME162 Embedded Controller Programmer’s Reference Guide. The transfer rate of the DMA controller is 44MB/sec at 25 MHz with parity off and interleaved DRAM and read cycles.
  • Page 92 MVME162 Functional Description MVME162/D2 4-13...

  • Page 93: Figure 4-1. Mvme162 Main Module Block Diagram

    Functional Description Figure 4-1. MVME162 Main Module Block Diagram 4-14 User’s Manual...
  • Page 94 MVME162 Functional Description MVME162/D2 4-15...

  • Page 95: Figure 4-2. Parity Dram Mezzanine Module Block Diagram

    Functional Description Figure 4-2. Parity DRAM Mezzanine Module Block Diagram 4-16 User’s Manual...

  • Page 96: Introduction

    SERIAL INTERCONNECTIONS Introduction As described in previous chapters of this manual, one of the MVME162’s two serial ports (port A internally, on the front panel) is SERIAL PORT 1/CONSOLE an EIA-232-D DCE port exclusively. The second port (port B internally, SERIAL on the front panel) can be configured via serial interface modules as an PORT 2...

  • Page 97: Table A-1. Eia-232-D Interconnections

    Serial Interconnections Table A-1. EIA-232-D Interconnections Signal Signal Name and Description Number Mnemonic Not used. Transmit Data. Data to be transmitted; input to modem from terminal. Receive Data. Data which is demodulated from the receive line; output from modem to terminal. Request To Send.

  • Page 98: Interface Characteristics

    EIA-232-D Connections A high EIA-232-D signal level is +3 to +15 volts. A low level is otes -3 to -15 volts. Connecting units in parallel may produce out- of-range voltages and is contrary to specifications. The EIA-232-D interface is intended to connect a terminal to a modem.

  • Page 99: Eia-530 Connections

    Serial Interconnections Table A-3. EIA-232-D Interface Receiver Characteristics Value Parameter Unit Minimum Maximum ±25 Input signal voltage Input high threshold voltage 2.25 Input low threshold voltage 0.75 Input hysteresis Ω Input impedance (-15V < V < +15V) 3000 7000 The MVME162 conforms to EIA-232-D specifications. Note that although the EIA-232-D standard recommends the use of short interconnection cables not more than 50 feet (15m) in length, longer cables are permissible provided the total load capacitance measured at the interface point and including signal...
  • Page 100 EIA-530 Connections Table A-4. Serial Port B EIA-530 Interconnect Signals (Continued) Signal Signal Name and Description Number Mnemonic RTS_A Request to Send (A). Output from DTE to DCE when required to transmit a message. CTS_A Clear to Send (A). Input to DTE from DCE to indicate that message transmission can begin.

  • Page 101: Interface Characteristics

    Serial Interconnections Table A-4. Serial Port B EIA-530 Interconnect Signals (Continued) Signal Signal Name and Description Number Mnemonic DTR_B Data Terminal Ready (B). Output from DTE to DCE indicating that the DTE is ready to send or receive data. TxCO_A Transmit Signal Element Timing—DTE (A).

  • Page 102: Table A-5. Eia-530 Interface Transmitter Characteristics

    EIA-530 Connections Table A-5. EIA-530 Interface Transmitter Characteristics Value Parameter Unit Minimum Maximum Differential output voltage (absolute, with 100Ω load) Open circuit differential voltage output (absolute) Output offset voltage (with 100Ω load) ±180 Short circuit output current (for any voltage between -7V and +7V) µ...

  • Page 103: Proper Grounding

    Serial Interconnections Proper Grounding An important subject to consider is the use of ground pins. There are two pins labeled GND. Pin 7 is the signal ground and must be connected to the distant device to complete the circuit. Pin 1 is the chassis ground, but it must be used with care.
  • Page 104 Index When using this index, keep in mind that a page number indicates only where referenced material begins. It may extend to the page or pages following the page referenced. Numerics 162Bug package 1-8 EIA-232-D interconnections A-1 SIM part numbers 2-4 backplane jumpers 2-10 EIA-530 battery...
  • Page 105 Index memory maps 3-3 53C710 SCSI 3-16 GCSR board control register 3-25 82596CA Ethernet LAN 3-15 general-purpose readable jumpers (J11) BBRAM configuration area 3-19 IPIC control/status 3-18 global bus timeout 2-12 IPIC overall 3-17 local bus 3-4 hardware interrupts 4-10 local I/O devices 3-5 hardware preparation 2-1 MCchip registers 3-14...
  • Page 106 SCSI VMEbus FIFO buffer 4-11 address/data configurations 2-12 interface 1-2, 1-8, 4-9 interface 1-2, 1-7, 4-5 termination 4-9 system controller functions 4-5 terminator power 2-13 VMEchip2 1-7 serial communications interface 4-5 serial interface modules (SIMs) 2-2 watchdog timers 4-10 part numbers 2-4 port B configuration 4-6 selection 2-2 serial interface parameters A-3...
  • Page 107 Index IN-4 User’s Manual...

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