Table of Contents
1.4.5 Function blocks (V850/SC3)
(1) Internal block diagram
NMI
INTP0 to INTP9
TI00, TI01,TI10, TI11
TI70, TI71, TI80, TI81
TI90, TI91, TI100, TI101
TI110, TI111, TI120, TI121
TO0, TO1, TO7 to TO12
TI5, TO5, TI6, TO6
SO0
SI0/SAD0
SCK0/SCL0
SO2
SI2/SDA1
SCK2/SCL1
SO3/TXD1
SI3/RXD1
SCK3/ASCK1
SO4/TXD0
SI4/RXD0
SCK4/ASCK0
SO5
SI5
SCK5
SO6
SI6
SCK6
TXD2
RXD2
ASCK2
TXD3
RXD3
ASCK3
KR0 to KR7
CANTX1
CANRX1
Note 1
CANTX2
Note 1
CANRX2
µ PD703089Y, 70F3089Y only
Notes 1.
µ PD703088Y, 703089Y: MODE
2.
µ PD70F3089Y: V
CHAPTER 1
ROM
INTC
512
KB
Timer counter
(16-bit timer)
TM0, TM1,
RAM
TM7 to TM12
TM5, TM6
24
SIO
KB
2
CSI0/I
C0
2
2
2
CSI2/I
CSI2/I
CSI2/I
C1
C1
C1
CSI3/UART1
CSI4/UART0
CSI5
CSI6
UART2
UART3
Key return
function
DMAC: 6 ch
Watch timer
Watchdog
timer
FCAN
(connect to either GND0, GND1, or GND2 in normal operating mode)
PP
User's Manual U15109EJ3V0UD
INTRODUCTION
CPU
ROM
correction
PC
32-bit
Multiplier
16 × 16 → 32
barrel shifter
System
registers
ALU
General-purpose
registers
32 bits × 32
Ports
HLDRQ (P96)
Instruction
HLDAK (P95)
queue
ASTB (P94)
DSTB/RD (P93)
R/W/WRH (P92)
UBEN (P91)
LBEN/WRL (P90)
BCU
WAIT (P110)
A16 to A21
(P60 to P65)
AD0 to AD15
(P40 to P47, P50 to P57)
CLKOUT
A/D
X1
converter
X2
CG
XT1
XT2
RESET
V
V
3.3 V
DD0
DD0
Regulator
GND0
GND0
VM45
VM45
V
DD1
PORTV
PORTV
PORTV
PORTGND0
PORTGND1
GND1
GND2
V
/MODE
PP
DD0
DD1
DD2
Note 2
53
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