Table of Contents
(3) Block diagram (ports 4 and 5)
RD
WR
PORT
WR
PM
Remarks 1. PMm: Port m mode register
RD:
Port m read signal
WR:
Port m write signal
2. m = 4, 5
n = 0 to 7
x = 0 to 15
CHAPTER 5
Figure 5-8. Block Diagram of P40 to P47 and P50 to P57
Output latch
(Pmn)
PMm
PMmn
User's Manual U15109EJ3V0UD
PORT FUNCTIONS
Selector
Pmn/ADx
159
- Quick Links:
- Pin Configuration (Top View) (V850/Sc1)
Hide quick links:
Table of Contents
