Turbo Boost Technology; Memory; Ddr-3 - HP DL370 - ProLiant - G6 Performance Introduction Manual
Technology and architecture of hp proliant intel-based 300-series g6 (generation 6) servers
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Also See for DL370 - ProLiant - G6 Performance:
- User manual (153 pages) ,
- Quickspecs (56 pages) ,
- Introduction manual (22 pages)
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Figure 3. Diagram representing SMT technology in the 5500 Series processor
Incorporating simultaneous multithreading improves performance at a proportionately small additional
power cost, improving performance per watt (W), and allowing ProLiant G6 servers to do more using
the same—or less—power as previous-generation, Intel processor-based servers.
Turbo Boost technology
Intel's Turbo Boost technology complements Simultaneous Multi-threading Technology by increasing
the performance of both multi-threaded and single-threaded workloads. For workloads and
applications that do not benefit from multi-threading, Turbo Boost technology can provide better
performance. Turbo Boost is engaged by default and automatically increases the clock frequency of
active cores operating below power and thermal design points determined by the processor. The
maximum frequency depends on the number of active cores and varies based on the specific
configuration on a per-processor-number basis. Turbo Boost technology is operating system
independent and operating systems that are Advanced Configuration and Power Interface-aware
(ACPI) require no changes to support Turbo Boost technology.
Memory
The Xeon 5500 Series processor connects directly to memory rather than through a chipset. The Xeon
5500 Series processor supports only DDR-3 dual inline memory modules (DIMMs). DDR-3 is part of
the synchronous dynamic random access memory (SDRAM) group of technologies. HP manages all
processor functionality options through the G6 server Basic Input/Output System (BIOS) and ROM
Based Setup Utility (RBSU). These options include Memory Mirroring and are discussed later in this
section.
DDR-3
DDR-3 has several key enhancements including an 8-bit prefetch buffer for storing data before it is
requested. By comparison, DDR-2 has a 4-bit buffer. For DDR-3, the data signal rate can increase to
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