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Summary of Contents for Texas Instruments FPD23DAEVM
- Page 1 FPD23DAEVM User's Guide User's Guide Literature Number: SNLU144 may 2013...
- Page 2 Chapter 1 SNLU144 – may 2013 Introduction FPD23DAEVM FPD23DAEVM is designed to directly adapt to one of the following types of RGB data and source HDMI/DVI compatible video output. • FPD-Link I (Four LVDS data/control streams and one LVDS clock pair) •...
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Page 3: Typical Application
3. Although designed to be used with an HDMI cable, it is easy to hook up the output to DVI display using an HDMI to DVI adapter cable. 4. Once a DC supply of 12V (recommended current limit is 500mA) is connected to FPD23DAEVM, it can supply 3.3V (400mA) DC to other devices used in the system such as deserializer. - Page 4 SNLU144 – may 2013 Quick Start Guide This chapter provides minimal steps required to setup FPD23DAEVM in the two hardware configuration depending upon the type of input signals. Switch and jumper position required for this operation have been set at the factory.
- Page 5 2. RN5, RN6, RN7 and RN8 should not be mounted to avoid stubs. 3. Verify pin VSS and REF to be shorted on JP6 while using RGB888 parallel LVCMOS input. Figure 2-2. FPD23DAEVM with Parallel LVCMOS input SNLU144 – may 2013...
- Page 6 Chapter 3 SNLU144 – may 2013 Evaluation Hardware Overview FPD23DAEVM includes circuits and interfaces facilitating the full control over the devices present on the board. Power FPD23DAEVM can be powered up by 6V(min) to 12V(max) DC supply as detailed in...
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Page 7: Video Output
TFP410 control associated with this switch. Pull up is not present for DDC_C pin. Pull up is not present for DDC_D pin. SNLU144 – may 2013 Evaluation Hardware Overview Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... - Page 8 Low level indicates a power on receiver is not detected • When I2C is enabled, this output is programmable through I2C interface, refer TFP410 device datasheet for more details. Evaluation Hardware Overview SNLU144 – may 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
- Page 9 I2C and Device Addressing www.ti.com I2C and Device Addressing FPD23DAEVM provides flexibility to configure I2C bus as per the requirement. Figure 3-3. I2C and Device Addressing 1. Header J7 is directly connected to U3 as shown in Figure 3-3, which allows implementation of external EDID (it requires mounting PCF8582C-2 on board).
- Page 10 This section provides basic steps to use Internal Test Pattern Generator of 720p FPD-Link III devices to observe the output on HDMI/DVI compatible display through FPD23DAEVM. ALP provides an interactive GUI to control the internal pattern generator of DS90Ux92x family of devices as shown below.
- Page 11 In Internal w/Ext. Clock mode, external PCLK is required on Serializer, all other signals are generated by the device itself. In Internal mode, all signals including PCLK are generated by the device itself. SNLU144 – may 2013 Using Internal Test Pattern Generation of 720p FPD-Link III Devices Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
- Page 12 5. Finally, check on Enable Generator and observe the output on display. Optionally, Enable Scrolling to view changing patterns on the display. Figure 4-5. Enable Generator and Scrolling Using Internal Test Pattern Generation of 720p FPD-Link III Devices SNLU144 – may 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
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Page 13: Board Schematic
Appendix A SNLU144 – may 2013 Board Schematic SNLU144 – may 2013 Board Schematic Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... - Page 14 Board Stackup www.ti.com Board Stackup Figure A-1. Board Stackup Board Schematic SNLU144 – may 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
- Page 15 Female HEADER 28x2 Figure A-2. Panel Bus digital transmitter: TFP410 SNLU144 – may 2013 Board Schematic Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
- Page 16 HEADER 10X2 RXIN0- RXIN0+ RXIN1- RXIN1+ RXIN2- RXIN2+ RXCLKIN- RXCLKIN+ RXIN3- RXIN3+ Figure A-3. LVDS Receiver: DS90CF386 Board Schematic SNLU144 – may 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
- Page 17 DAT0_S TPD4E001 0.1uF HOT_PLUG Clock_Shield CLK_S Clock+ CLK+ Clock- CLK- HDMI Type A 732-2737-2-ND 4.7K 4.7K 0603 0603 DIP8 SOCKET(PCF8582C-2) Figure A-4. Power and ESD SNLU144 – may 2013 Board Schematic Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
- Page 18 Board Schematic SNLU144 – may 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
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Page 19: Bill Of Materials
Appendix B SNLU144 – may 2013 Bill of Materials FPD23DAEVM BOM Table B-1. Bill of Material for FPD23DAEVM Reference Part Digi-Key P/N Comments Footprint 22uF 2917 493-2391-2-ND CAP TANT 22UF 25V 20% 2917 C2, C3, C5 10uF 2312 718-1044-1-ND CAP TANT 10UF 25V 20% 2312 CAP CER 0.1UF 25V 10% X7R... - Page 20 FPD23DAEVM BOM www.ti.com Table B-1. Bill of Material for FPD23DAEVM (continued) Reference Part Digi-Key P/N Comments Footprint BSS123LT1GOSTR- MOSFET N-CH 100V 170MA SOT- BSS123 SOT_23 (#1) RN1, RN2, RN3 RESAR_IS_8/ RES ARRAY ZERO OHM 8 RES RN_1506 Y1000TR-ND (#2) RN5, RN6, RN7...
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Page 21: Board Layout
Appendix C SNLU144 – may 2013 Board Layout Board Layers The following mechanical drawings illustrate the physical layout and stack-up of the 4-layer FPD23DAEVM evaluation board: Figure C-1. Top Silkscreen SNLU144 – may 2013 Board Layout Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated... - Page 22 Board Layers www.ti.com Figure C-2. Top Layer Figure C-3. Layer 2: Ground Board Layout SNLU144 – may 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
- Page 23 Board Layers www.ti.com Figure C-4. Layer 3: Power Figure C-5. Bottom Layer SNLU144 – may 2013 Board Layout Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...
- Page 24 Board Layers www.ti.com Figure C-6. Bottom Silkscreen Board Layout SNLU144 – may 2013 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated...