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SONY
CXD256"
3M
Description
of
Functions
I/O
Synchronization
Circuit
J)
Theory
The
synchronizing
circuit
has a
window
lor
monitoring the
input
LRCK
signal
to
determine whether
there
is
a
rising
edge
{LRCK
J")
within
it.
If
the
LRCK
J"
is
outside the
window
when
power
is
switched
on, the
synchronizing
circuit
stops
internal
processing
at
timing
centered
on
the
window, and
restarts
in
synchronization
with
the
occurrence
of
the next
LRCK
_f
.
This operation
synchronizes
this
LSI to external
systems.
®
Resynchronization by
INfT
If
the
LRCK
J"
is
within
the
window,
but
is
too close
to
either
sides
of the
window,
synchronization
may
be
affected
by
factors
such
as
external noise.
Thus,
it
is
always necessary
to
resynchronize
after
power
is
switched
on.
Resynchronization
is
done
at
a
timing of
approximately
four
cycles
of
LRCK
at
the
Fs
rate
from
the
rising
edge
of
INIT,
and
it
initializes
the
synchronizing
circuit
to
center the
LRCK
J"
in
the
window.
INIT input
Internal
IN
IT
sional
Resynchronization occurs
3t
this
point
/
-iS-
I
Approx.
4
cycles of
Fs-rate
LRCK
Input
Timing
(8fs
Rate)
r
LRCK1
|
bcki
mrLriJinjuiJMiJinjinj^^
DLI
xj
.
DRI
xi
mot
JJJJZ
-91
-
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