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Q Q
3 7 6 3 1 5 1 5 0
5-3-3. SCHEMATIC DIAGRAM — TX BOARD (2/2) — • Refer to page 36 for IC Block Diagrams. • Refer to page 24 for Waveforms.
T E
L
1 3 9 4 2 2 9 6 5 1 3
w w w
(Page 26)
.
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Note:
• All capacitors are in µF unless otherwise noted. pF: µµF
• All resistors are in Ω and
• U : B+ Line.
• Power voltage is dc 9 V and fed with regulated dc power
• Voltage and waveforms are dc with respect to ground
x
a o
u 1 6 3
y
i
– 27 –
http://www.xiaoyu163.com
8
50 WV or less are not indicated except for electrolytics
and tantalums.
1
/
W or less unless otherwise
4
specified.
supply from external power voltage jack.
under no-signal conditions.
LOGIC LEVEL
CONVERTER
LOGIC LEVEL
CONVERTER
Q
Q
3
7
6
3
1
c o
.
2
4
9
9
8
no mark : DIGITAL mode
(
) : ANALOG mode
∗
: Impossible to measure
• Voltages are taken with a VOM (Input impedance 10 MΩ).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
• Circled numbers refer to waveforms.
5
1
5
0
8
9
2
4
9
m
– 28 –
DP-IF5100
2
9
9
• Signal path.
F
: ANALOG
J
: RF
c : DIGITAL
(Page 26)
8
2
9
9
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