Page 1 Hard Disk Drive Specification Deskstar T7K250 3.5 inch Ultra ATA/133 hard disk drive 3.5 inch Serial ATA hard disk drive Models: HDT722516DLAT80 HDT722516DLA380 HDT722525DLAT80 HDT722525DLA380 HDT722520DLAT80 HDT722520DLA380 Version 1.8 12 September 2006...
Page 3 Hard Disk Drive Specification Deskstar T7K250 3.5 inch Ultra ATA/133 hard disk drive 3.5 inch Serial ATA hard disk drive Models: HDT722516DLAT80 HDT722516DLA380 HDT722525DLAT80 HDT722525DLA380 HDT722520DLAT80 HDT722520DLA380 Version 1.8 12 September 2006...
Page 4 It is possible that this publication may contain reference to, or information about, Hitachi products (machines and programs), programming, or services that are not announced in your country. Such references or information must not be construed to mean that Hitachi intends to announce such Hitachi products, programming, or services in your coun- try.
Page 5: Table Of Contents
Table Of Contents 1.0 General........................1 1.1 Introduction....................1 1.2 References....................1 1.3 Abbreviations...................1 1.4 Caution.....................3 2.0 General features of the drive ................5 3.0 Fixed-disk subsystem description..............9 3.1 Control electronics ...................9 3.2 Head disk assembly ................9 3.3 Actuator ....................9 4.0 Drive characteristics ..................11 4.1 Default logical drive parameters..............11 4.2 Data sheet....................11 4.3 World Wide Name Assignment ...............12...
Page 6 6.6 Out of band signaling (SATA model)............30 6.7 Reset timings....................31 6.8 PIO timings ....................32 6.8.1 Write DRQ interval time..............32 6.8.2 Read DRQ interval time ..............33 6.9 Multi word DMA timings ................34 6.10 Ultra DMA timings ................35 6.10.1 Initiating Read DMA ..............35 6.10.2 Host Pausing Read DMA..............36 6.10.3 Host Terminating Read DMA............37 6.10.4 Device Terminating Read DMA...........38...
Page 7 7.6.2 Nonoperating vibration ..............62 7.6.3 Operating shock ................63 7.6.4 Nonoperating shock ................63 7.6.5 Nonoperating rotational shock............64 7.7 Acoustics....................65 7.8 Identification labels..................65 7.9 Safety .......................66 7.9.1 UL and CSA approval..............66 7.9.2 German safety mark................66 7.9.3 Flammability ...................66 7.9.4 Safe handling ..................66 7.9.5 Environment..................66 7.9.6 Secondary circuit protection ............66 7.10 Electromagnetic compatibility ...............67...
Page 8 10.4.1 Logical CHS addressing mode .............82 10.4.2 LBA addressing mode ..............82 10.5 Overlapped and queued feature .............82 10.6 Power management features ..............84 10.6.1 Power mode ..................84 10.6.2 Power management commands ............84 10.6.3 Standby timer ................84 10.6.4 Interface capability for power modes ...........85 10.7 S.M.A.R.T.
Page 9 11.5 DMA queued commands ...............112 12.0 Command descriptions..................113 12.1 Check Power Mode (E5h/98h) ..............117 12.2 Device Configuration Overlay (B1h) ............118 12.2.1 DEVICE CONFIGURATION RESTORE ........118 12.2.2 DEVICE CONFIGURATION FREEZE LOCK (subcommand C1h)118 12.2.3 DEVICE CONFIGURATION IDENTIFY (subcommand C2h).119 12.2.4 DEVICE CONFIGURATION SET (subcommand C3h) .....119 12.3 Execute Device Diagnostic (90h) ............122 12.4 Flush Cache (E7h) .................123 12.5 Flush Cache Ext (EAh) ................124...
Page 10 12.37 Seek (7xh) ...................185 12.38 Service (A2h ..................)186 12.39 Set Features (EFh) ................187 12.39.1 Set Transfer mode ...............188 12.39.2 Write Cache ................188 12.39.3 Advanced Power Management ...........188 12.39.4 Automatic Acoustic Management ..........189 12.40 Set Max ADDRESS (F9h) ..............190 12.40.1 Set Max Set Password (Feature=01h).........192 12.40.2 Set Max Lock (Feature=02h)............193 12.40.3 Set Max Unlock (Feature = 03h) ..........194 12.40.4 Set Max Freeze Lock (Feature = 04h) ........195...
Page 11 List of Tables Table 1.Mechanical positioning performance ............11 Table 2.Cylinder allocation..................13 Table 3.Command overhead ..................15 Table 4.Mechanical positioning performance ............15 Table 5.Full stroke seek time ..................16 Table 6.Head switch time ..................16 Table 7.Single track seek time ...................17 Table 8.Latency Time ....................17 Table 9.Drive ready time ...................17 Table 10.Data transfer speed ..................18 Table 11.Simple Sequential Access performance............19...
Page 12 Table 42.Rotational shock ..................64 Table 43.Sound power levels..................65 Table 44.Sound power levels..................65 Table 45.Register Set ....................71 Table 46.Alternate Status Register ................72 Table 47.Device Control Register ................73 Table 48.Drive Address Register................74 Table 49.Device Head/Register .................74 Table 50.Error Register....................75 Table 51.Status Register ....................76 Table 52.Reset response table..................79 Table 53.Default Register Values ................80 Table 54.Diagnostic codes ..................80...
Page 13 Table 88.Read Log Ext Command (2Fh)..............148 Table 89.Log Address Definition ................149 Table 90.General Purpose Log Directory ..............149 Table 91.Extended Comprehensive SMART Error Log ...........150 Table 92.Extended Error log data structure ...............150 Table 93.Command data structure ................151 Table 94.Error data structure ..................151 Table 95.Read Long (22h/23h) ..................154 Table 96.Read Multiple (C4h) ...................156 Table 97.Read DMA Ext Command (25h) ..............158...
Page 14 Table 134.Error data structure ...................209 Table 135.Self-test log data structure ................210 Table 136.S.M.A.R.T. Error Codes ................211 Table 137.Standby (E2h/96h) ..................212 Table 138.Standby Immediate (E0h/94h) ..............213 Table 139.Write Buffer (E8h)..................214 Table 140.Write DMA Queued Command CAh/CBh) ..........215 Table 141.Write Sectors command (30h/31h) ............231 Table 142.Write Sector(s) Command (34h) .............233...
Page 15: Introduction
1.0 General 1.1 Introduction This document describes the specifications of the Deskstar T7K250, a 3.5-inch hard disk drive with ATA interface and a rotational speed of 7200 RPM. HDT722516DLAT80 160.0 GB HDT722520DLAT80 200 GB HDT722525DLAT80 250.0 GB HDT722516DLA380 160.0 GB (3Gbps*) HDT722520DLA380 200 GB (3Gbps*) HDT722525DLA380...
Page 16 Federal Communications Commission field replacement unit gravity (a unit of force) (32 ft/sec) per Hertz 1,000,000,000 bits 1,000,000,000 bytes ground hexadecimal hard disk drive Hertz Input integrated lead suspension Input/Output International Standards Organization 1,000 bytes Kbpi 1000 bits per inch kgf-cm kilogram (force)-centimeter kilohertz...
Page 17: Caution
read/write second SELV secondary low voltage S.M.A.R.TSelf-Monitoring, Analysis, and Reporting Technology tracks per inch track transistor-transistor logic Underwriters Laboratory volt Verband Deutscher Electrotechniker watt 3-state transistor-transistor tristate logic 1.4 Caution • Do not apply force to the top cover. • Do not cover the breathing hole on the top cover. •...
Page 18 Deskstar T7K250 Hard Disk Drive Specification...
Page 19: General Features Of The Drive
2.0 General features of the drive • Formatted capacities of 160 GB, 200 GB, 250 GB • Spindle speeds of 7200 RPM • Fluid Dynamic Bearing motor • Enhanced IDE interface • Sector format of 512 bytes/sector • Closed-loop actuator servo •...
Page 20 Deskstar T7K250 Hard Disk Drive Specification...
Page 21 Part 1. Functional specification Deskstar T7K250 Hard Disk Drive specification...
Page 22 Deskstar T7K250 Hard Disk Drive Specification...
Page 23: Control Electronics
3.0 Fixed-disk subsystem description 3.1 Control electronics The drive is electronically controlled by a microprocessor, several logic modules, digital/analog modules, and var- ious drivers and receivers. The control electronics performs the following major functions: • Controls and interprets all interface signals between the host controller and the drive. •...
Page 24 Deskstar T7K250 Hard Disk Drive Specification...
Page 25: Default Logical Drive Parameters
4.0 Drive characteristics 4.1 Default logical drive parameters HDT722516DLxxxx HDT722525DLxxxx HDT722520DLxxxx Physical Layout Label capacity (GB) Bytes per sector Sectors per track 594-1242 630-1296 594-1242 Number of heads Number of disks Data sectors per cylinder 1782-3726 2520-5184 2376-4968 Data cylinders per zone 601-7060 1810-8341 500-6500...
Page 26: World Wide Name Assignment
4.3 World Wide Name Assignment Description 200 GB, 250 GB 160 GB Organization Hitachi GST Manufacturing Site Sriracha Plant Thailand\ Hitachi Global Storage Products (Shenzen)Co.Ltd., China Product Deskstar T7K250 000CCAh SHBU Block Assignment -Thailand 20Bh 205h -China 307h 306h Port/Node ID...
Page 27: Drive Organization
4.4 Drive organization 4.4.1 Drive format Upon shipment from manufacturing the drive satisfies the sector continuity in the physical format by means of the defect flagging strategy described in Section 5.0, “Defect flagging strategy” on page 21 in order to provide the maximum performance to users.
Page 28 This cylinder contains the user data which can be sent and retrieved via read/write commands and a spare area for reassigned data. Spare cylinder The spare cylinder is used by Hitachi Global Storage Technologies manufacturing and includes data sent from a defect location. Deskstar T7K250 Hard Disk Drive Specification...
Page 29: Performance Characteristics
4.5 Performance characteristics Drive performance is characterized by the following parameters: • Command overhead • Mechanical head positioning Seek time Latency • Data transfer speed • Buffering operation (Look ahead/Write cache) All the above parameters contribute to drive performance. There are other parameters that contribute to the perfor- mance of the actual system.
Page 30: Table 5.Full Stroke Seek Time
The terms “Typical” and “Max” are used throughout this document and are defined as follows: Typical The average of the drive population tested at nominal environmental and voltage conditions. Maximum value measured on any one drive over the full range of the environmental and voltage conditions.
Page 31: Table 7.Single Track Seek Time
4.5.2.4 Cylinder switch time (cylinder skew) Cylinder switch time is defined as the amount of time required by the fixed disk to access the next sequential block after reading the last sector in the current cylinder. The measuring method is given in Section 4.5.5, “Throughput” on page 19. 4.5.2.5 Single track seek time (without command overhead, including settling) Table 7: Single track seek time Function...
Page 32: Table 10.Data Transfer Speed
4.5.4 Data transfer speed Table 10: Data transfer speed Data transfer speed Mbytes/sec Disk-Buffer transfer (Zone 0) Instantaneous - typical 79.6 Sustained - read typical 67.8 Disk-Buffer transfer (Zone 29) Instantaneous - typical 38.7 Sustained - read typical 32.9 Buffer - host (max) •...
Page 33: Throughput
4.5.5 Throughput 4.5.5.1 Simple sequential access The following table illustrates simple sequential access for the three-disk enclosure. Table 11: Simple Sequential Access performance Operation Typical (sec) Max (sec) Sequential Read (Zone 0) 0.28 0.29 Sequential Read (Zone 29) 0.55 0.58 The above table gives the time required to read a total of 8000h consecutive blocks (16,777,216 bytes) accessed by 128 read commands.
Page 34: Table 13.Description Of Operating Modes
E = Buffer-host transfer rate (byte/s) 4.5.6 Operating modes 4.5.6.1 Description of operating modes Table 13: Description of operating modes Operating mode Description Start up time period from spindle stop or power down. Spin-up Seek operation mode Seek Write operation mode Write Read operation mode Read...
Page 35: Defect Flagging Strategy
5.0 Defect flagging strategy Media defects are remapped to the next available sector during the Format Process in manufacturing. The mapping from LBA to the physical locations is calculated by an internally maintained table. Shipped format • Data areas are optimally used. •...
Page 36 Deskstar T7K250 Hard Disk Drive Specification...
Page 37: Connector Location
6.0 Electrical interface specification 6.1 Connector location Refer to the following illustration to see the location of the connectors Deskstar T7K250 Hard Disk Drive Specification...
Page 38: Dc Power Connector
6.1.1 DC power connector The DC power connector is designed to mate with AMP part number 1-480424-0 using AMP pins part number 350078-4 (strip), part number 61173-4 (loose piece), or their equivalents. Pin assignments are shown in the figure below. Voltage +12 V 6.1.2 AT signal connector...
Page 39: Table 16.Signal Definitions
6.2 Signal definitions(PATA model) The pin assignments of interface signals are listed as follows: Table 16: Signal definitions SIGNAL Type SIGNAL Type RESET- 3–state DD08 3–state 3–state DD09 3–state 3–state DD10 3–state 3–state DD11 3–state 3–state DD12 3–state 3–state DD13 3–state 3–state DD14...
Page 40: Signal Descriptions
6.3 Signal descriptions Table 17: Special signal definitions for Ultra DMA Special Definition Conventional (for Ultra DMA) Definition DDMARDY- IORDY Write Operation HSTROBE DIOR- STOP DIOW- HDMARDY- DIOR- Read Operation DSTROBE IORDY STOP DIOW- DD00–DD15 A 16-bit bi-directional data bus between the host and the drive. The lower 8 lines, DD00-07, are used for Regis- ter and ECC access.
Page 41 DASP- This is a time-multiplexed signal which indicates that a drive is active or that device 1 is present. This signal is driven by an Open-Drain driver and internally pulled up to 5 volts through a 10 kW resistor. During a Power-On initialization or after RESET- is negated, DASP- shall be asserted by Device 1 within 400 ms to indicate that device 1 is present.
Page 42 DMACK- This signal shall be used by the host in response to DMARQ to either acknowledge that data has been accepted, or that data is available. This signal is internally pulled up to 5 Volt through a 15kΩ resistor with a resistor tolerance value of –50% to +100%.
Page 43: Interface Logic Signal Levels(Pata Model)
6.4 Interface logic signal levels(PATA model) The interface logic signals have the following electrical specifications: Input High Voltage 2.0 V min Inputs Input Low Voltage –0.8 V max. Output High Voltage 2.4 V min. Outputs: Output Low Voltage 0.5 V max. 6.5 Signal definition (SATA model) SATA has receivers and drivers to be connected to Tx+/- and Rx+/-.
Page 44: Tx+ / Tx
6.5.1 TX+ / TX- These signal are the outbound high-speed differrential signals that are connected to the serial ATA cable. 6.5.2 RX+ / RX- These signals are the inbound high-speed differential signals that are connected to the serial ATA cable. The fol- lowing standard shall be referenced about signal specifications.
Page 45: Reset Timings
6.7 Reset timings Table 18: System reset timing chart Table 19: System reset timing PARAMETER DESCRIPTION Min (µs) Max (µs) RESET low width RESET high to not BUSY Deskstar T7K250 Hard Disk Drive Specification...
Page 46: Pio Timings
6.8 PIO timings The PIO cycle timings meet Mode 4 of the ATA/ATAPI-6 description. CS(1:0)- DA(2:0) DIOR-, DIOW - W rite data DD(15:0) Read data DD(15:0) t7(*) t8(*) IOCS16-(*) IORDY (*) Up to ATA-2 (mode-0,1,2) PARAMETER DESCRIPTION MIN (ns) MAX (ns) Cycle time –...
Page 47: Read Drq Interval Time
6.8.2 Read DRQ interval time For read sectors and read multiple operations the interval from the end of negation of the DRQ bit until setting of the next DRQ bit is as follows: • In the event that a host reads the status register only before the sector or block transfer DRQ interval, the DRQ interval 4.2 µs •...
Page 48: Multi Word Dma Timings
6.9 Multi word DMA timings The Multiword DMA timings meet Mode 2 of the ATA/ATAPI-6 description. CS0-/CS1- tLR/tLW DMARQ DMACK- tKR/tKW DIOR-/DIOW- READ DATA WRITE DATA PARAMETER DESCRIPTION MIN (ns) MAX (ns) Cycle time – DIOR-/DIOW- asserted pulse width – DIOR- data access –...
Page 49: Ultra Dma Timings
6.10 Ultra DMA timings The Ultra DMA timings meet Mode 0, 1, 2, and 4 of the Ultra DMA Protocol. 6.10.1 Initiating Read DMA DMARQ DMACK- tACK tENV STOP tACK tENV t2CYC HDMARDY- tZIORDY tCYC tCYC DSTROBE tZAD DD(15:0) xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxx RD Data RD Data...
Page 50: Host Pausing Read Dma
6.10.2 Host Pausing Read DMA Table 20: Ultra DMA cycle timing chart (Host pausing Read) DMARQ DMACK- STOP HDMARDY- tRFS DSTROBE Table 21: Ultra DMA cycle timings (Host pausing Read) MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 PARAMETER DESCRIPTION (all values in ns)
Page 51: Host Terminating Read Dma
6.10.3 Host Terminating Read DMA Table 22: Ultra DMA cycle timing chart (Host terminating Read) DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tRFS tIORDYZ DSTROBE xxxxxxxxxxxxxxxxxx RD Data xxxxxxxxxxx DD(15:0) tZAH Device drives DD Host drives DD Table 23: Ultra DMA cycle timings (Host Terminating Read) MODE 0 MODE 1 MODE 2...
Page 52: Device Terminating Read Dma
6.10.4 Device Terminating Read DMA Table 24: Ultra DMA cycle timing chart (Device terminating Read) DMARQ tMLI DMACK- tACK STOP tACK HDMARDY- tIORDYZ DSTROBE xxxxxx xxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) tZAH Host drives DD Device drives DD Table 25: Ultra DMA cycle timings (Device Terminating Read) MODE 0 MODE 1 MODE 2...
Page 53: Initiating Write Dma
6.10.5 Initiating Write DMA Table 26: Ultra DMA cycle timing chart (Initiating Write) DMARQ DMACK- tENV tACK STOP tZIORDY t2CYC DDMARDY- tCYC tCYC tACK HSTROBE DD(15:0) xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx WT Data WT Data WT Data Host drives DD Table 27: Ultra DMA cycle timings (Initiating Write) MODE 0 MODE 1 MODE 2...
Page 54: Device Pausing Write Dma
6.10.6 Device Pausing Write DMA Table 28: Ultra DMA cycle timing chart (Device Pausing Write) DMARQ DMACK- STOP DDMARDY- tRFS HSTROBE Table 29: Ultra DMA cycle timing chart (Device Pausing Write) PARAMETER MODE 0 MODE 1 MODE 2 MODE 3 MODE 4 MODE 5 DESCRIPTION...
Page 55: Device Terminating Write Dma
6.10.7 Device Terminating Write DMA Table 30: Ultra DMA cycle timing chart (Device Terminating Write) DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK tRFS HSTROBE xxx WT Data xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) Host drives DD Table 31: Ultra DMA cycle timings (Device terminating Write) PARAMETER MODE 0 MODE 1...
Page 56: Host Terminating Write Dma
6.10.8 Host Terminating Write DMA Table 32: Ultra DMA cycle timing chart (Host Terminating Write) DMARQ tMLI DMACK- tACK STOP tIORDYZ DDMARDY- tACK HSTROBE xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxx DD(15:0) Host drives DD Table 33: Ultra DMA cycle timings (Host Terminating Write) PARAMETER MODE 0 MODE 1 MODE 2...
Page 57: Addressing Of Registers
6.11 Addressing of registers The host addresses the drive through a set of registers called a Task File. These registers are mapped into the host's I/O space. Two chip select lines (CS0– and CS1–) and three address lines (DA0–2) are used to select one of these registers, while a DIOR–...
Page 58 Deskstar T7K250 Hard Disk Drive Specification...
Page 59 Part 2. Interface specification Deskstar T7K250 Hard Disk Drive Specification...
Page 60 Deskstar T7K250 Hard Disk Drive Specification...
Page 61: Jumper Settings
7.0 Specification 7.1 Jumper settings 7.1.1 Jumper pin location Jum per pins 7.1.2 Jumper pin identification Pin I Pin A DERA001.prz Pin B Deskstar T7K250 Hard Disk Drive Specification...
Page 62: Jumper Pin Assignment
7.1.3 Jumper pin assignment There are four jumper settings as shown in the following sections: • 16 logical head default (normal use) • 15logical head default • 32 GB clip • Power up in standby Within each of these four jumper settings the pin assignment selects Device 0, Device 1, Cable Selection, or Device 1 Slave Present as shown in the following figures.
Page 63: Jumper Positions
CS/SP RS V 7.1.4 Jumper positions 7.1.4.1 16 logical head default (normal use) The figure below shows the jumper positions used to select Device 0, Device 1, Cable Selection, or Device1 (Slave) Present. DEVICE 0 (Master) DEVICE 1 (Slave) CABLE SEL DEVICE 1 (Slave) Present Shipping Default Condition...
Page 64: Logical Head Default
2. In CSEL mode, installing or removing the jumper blocks at A-B or C-D position does not affect any selec- tion of Device or Cable Selection mode. 3. The shipping default position is the Device 0 position. 7.1.4.2 15 logical head default The figure below shows the jumper positions used to select Device 0, Device 1, Cable Selection, or Device1 (Slave) Present setting 15 logical heads instead of default 16 logical head models.
Page 65 7.1.4.3 Capacity clip to 32GB The figure below shows the jumper positions used to select Device 0, Device 1, Cable Selection, or Device1 (Slave) Present while setting the drive capacity down to 32 GB for the purpose of compatibility. DEVICE 0 (M aster) DEVICE 1 (Slave)
Page 66 Notes: 1. These jumper settings are used for limiting power supply current when multiple drives are used. 2. Command to spin up is SET FEATURES (subcommand 07h). Refer to 12.28 Set Features. 3. To enable the CSEL mode (Cable Selection mode) the jumper block must be installed at E-F. In the CSEL mode the drive address is determined by AT interface signal #28 CSEL as follows: •...
Page 67: Environment
7.2 Environment 7.2.1 Temperature and humidity Table 35: Temperature and humidity Operating conditions Temperature 5C to 55ºC (See note below) Relative humidity 8 to 90%, non-condensing Maximum wet bulb temperature 29.4ºC, non-condensing Maximum temperature gradient 15ºC/hour Altitude –300 to 3,048 m Non-operating conditions Temperature –40C to 65ºC...
Page 68: Corrosion Test
1 0 0 3 6 ' C / 9 5 % W e t B u i b = 3 5 . 0 ' C 3 1 ' C / 9 0 % W e t B u i b = 2 9 . 4 ' C N o n - o p e r a t i n g O p e r a t i n g 6 5 ' C / 1 4 %...
Page 69: Power Supply Current (Typical)
7.3.2 Power supply current (typical) Table 37: Power supply current of xxx-GB models Power supply current of +5 Volts (mA) +12 Volts (mA) Total (W) 160 GB-250 GB model Pop mean Pop mean Std dev (PATA models) Idle average 5.24 Idle ripple (peak-to-peak) Low RPM idle 2.72...
Page 70: Table 38.Power Supply Generated Ripple At Drive Power Connector
Power supply current of 160 +5 Volts (mA) +12 Volts (mA) Total (W) GB and 250 GB model Pop mean Pop mean Std dev (SATA models) Silent R/W average 1450 1000 Silent R/W peak Start up (max) 1200 1880 Standby average 1.93 Sleep average 1.68...
Page 71: Reliability
7.4 Reliability 7.4.1 Data integrity No more than one sector is lost at Power loss condition during the write operation when the write cache option is disabled. If the write cache option is active, the data in write cache will be lost. To prevent the loss of customer data, it is recommended that the last write access before power off be issued after setting the write cache off.
Page 72: Mechanical Specifications
7.5 Mechanical specifications 7.5.1 Physical dimensions and weight All dimensions in the above figure are in millimeters. The breather hole must be kept uncovered in order to keep the air pressure inside of the disk enclosure equal to external air pressure. Deskstar T7K250 Hard Disk Drive Specification...
Page 73: Mounting Hole Locations
The following table lists the dimensions of the drive. Table 39: Physical dimensions and weight Height [mm] 25.4±0.4 Width [mm] 101.6±0.4 Length [mm] 146.0±0.6 Weight [grams - maximum] 7.5.2 Mounting hole locations The mounting hole locations and size of the drive are shown below. All dimensions are in mm. Thread 6-32 UNC 41.28±0.5...
Page 74: Connector Locations
7.5.3 Connector locations 7.5.4 Drive mounting The drive will operate in all axes (6 directions). Performance and error rate will stay within specification limits if the drive is operated in the other orientations from which it was formatted. For reliable operation, the drive must be mounted in the system securely enough to prevent excessive motion or vibration of the drive during seek operation or spindle rotation, using appropriate screws or equivalent mounting hardware.
Page 75: Heads Unload And Actuator Lock
The recommended mounting screw torque is 0.6 - 1.0 Nm (6-10 Kgf.cm). The recommended mounting screw depth is 4 mm maximum for bottom and 4.5 mm maximum for horizontal mounting. Drive level vibration test and shock test are to be conducted with the drive mounted to the table using the bottom four screws.
Page 76: Vibration And Shock
7.6 Vibration and shock All vibration and shock measurements recorded in this section are made with a drive that has no mounting attach- ments for the systems. The input power for the measurements is applied to the normal drive mounting points. 7.6.1 Operating vibration 7.6.1.1 Random vibration The test is 30 minutes of random vibration using the power spectral density (PSD) levels shown below in each of...
Page 77: Operating Shock
The overall RMS (root mean square) level of vibration is 1.04 G. 7.6.2.2 Swept sine vibration • 2 G (zero-to-peak), 5 to 500 to 5 Hz sine wave • 0.5 oct/min sweep rate • 3 minutes dwell at two major resonances 7.6.3 Operating shock The drive meets the following criteria while operating in the conditions described below.
Page 78: Nonoperating Rotational Shock
7.6.4.2 Sinusoidal shock wave The shape is approximately half-sine pulse. The figure below shows the maximum acceleration level and duration. Table 42: Sinusoidal shock wave Acceleration level (G) Duration (ms) 7.6.5 Nonoperating rotational shock All shock inputs shall be applied around the actuator pivot axis. Table 43: Rotational shock Duration Rad/sec...
Page 79: Acoustics
7.8 Identification labels The following labels are affixed to every drive: • A label containing the Hitachi logo, the Hitachi Global Storage Technologies part number and the statement " Made by Hitachi Global Storage Technologies Inc." or Hitachi Global Storage Technol- ogies approved equivalent.
Page 80: Safety
United Nations Environment Program Montreal Protocol, and as ratified by the member nations. Material to be controlled include CFC-11, CFC-12, CFC-113, CFC-114, CFC-115, Halon 1211, Halon 1301 and Halon 2402. Although not specified by the Protocol, CFC-112 is also controlled. In addition to the Protocol Hitachi Global Stor- age Technologies requires the following: •...
Page 81: Electromagnetic Compatibility
The product is declared to be in conformity with requirements of the following EC directives under the sole responsibility of Hitachi Global Storage Technologies Japan Ltd: Council Directive 89/336/EEC on the approximation of laws of the Member States relating to electromagnetic compatibility.
Page 82 Deskstar T7K250 Hard Disk Drive Specification...
Page 83: Terminology
8.0 General 8.1 Introduction This specification describes the host interface of the Deskstar T7K250 hard disk drive. The interface conforms to the Working Document of Information technology, AT Attachment with Packet Interface Extension (ATA/ATAPI-6) Revision 3b, dated 26 February 2002, with certain limitations described in Section 8.3 below.
Page 84 Deskstar T7K250 Hard Disk Drive Specification...
Page 85: Table 50.Error Register
9.0 Registers 9.1 Register set Table 46: Register Set Addresses Functions CS0- CS1- READ (DIOR-) WRITE (DIOW-) Data bus high impedance Not used Control block registers Data bus high impedance Not used Data bus high impedance Not used Alternate Status Device Control Device Address Not used...
Page 86: Alternate Status Register
9.2 Alternate Status Register Table 47: Alternate Status Register DSC/ SERV This register contains the same information as the Status Register. The only difference between this register and the Status Register is that reading the Alternate Status Register does not imply an interrupt acknowledge or a clear of a pending interrupt.
Page 87: Data Register
9.6 Data Register This register is used to transfer data blocks between the device data buffer and the host. It is also the register through which sector information is transferred on a Format Track command and the configuration information is transferred on an Identify Device command.
Page 88: Drive Address Register
9.8 Drive Address Register Table 49: Drive Address Register -WTG -DS1 -DS0 This register contains the inverted drive select and head select addresses of the currently selected drive. Definitions High Impedance. This bit is not a device and will always be in a high impedance state. -WTG Write Gate.
Page 89: Error Register
9.10 Error Register Table 51: Error Register IDNF ABRT TK0NF AMNF This register contains the status from the last command executed by the device or a diagnostic code. At the comple- tion of any command, except Execute Device Diagnostic, the contents of this register are always valid even if ERR = 0 is in the Status Register.
Page 90: Sector Number Register
9.13 Sector Number Register This register contains the starting sector number for any disk data access for the subsequent command. The sector number is from one to the maximum number of sectors per track. In LBA mode, this register contains Bits 0–7. At the end of the command this register is updated to reflect the cur- rent LBA Bits 0–7.
Page 91 Definitions Busy. Bit BSY=1 whenever the device is accessing the registers. The host should not read or write any registers when BSY=1. If the host reads any register when BSY=1, the contents of the Status Register will be returned. DRDY Device Ready.
Page 92 Deskstar T7K250 Hard Disk Drive Specification...
Page 93: Reset Response
10.0 General operation 10.1 Reset response ATA has the following three types of resets: The device executes a series of electrical circuitry diagnostics, spins up the Power On Reset (POR) head disk assembly, tests speed and other mechanical parametric, and sets default values.
Page 94: Register Initialization
10.2 Register initialization After a power on, a hard reset, or a software reset, the register values are initialized as shown in the table below. Table 54: Default Register Values Register Default Value Error Diagnostic Code Sector Count Sector Number Cylinder Low Cylinder High Device/Head...
Page 95: Diagnostic And Reset Considerations
10.3 Diagnostic and Reset considerations For each Reset and Execute Device Diagnostic, the diagnostic is done as follows: Power On Reset DASP– is read by Device 0 to determine if Device 1 is present. If Device 1 is present, Device 0 shall read PDIAG– to determine when it is valid to clear the BSY bit and whether Device 1 has powered on or reset without error, otherwise Device 0 clears the BSY bit whenever it is ready to accept commands.
Page 96: Sector Addressing Mode
10.4 Sector Addressing Mode All addressing of data sectors recorded on the device's media is done by a logical sector address. The logical CHS address for the Deskstar T7K250 is different from the actual physical CHS location of the data sector on the disk media.
Page 97 The only commands that may be overlapped are NOP (with 01h subcommand code) (’00’h) Read DMA Queued (’C7’h) Service (’A2’h) Write DMA Queued (’CC’h) For the READ DMA QUEUED and WRITE DMA QUEUED commands, the device may or may not perform a bus release.
Page 98: Power Management Features
10.6 Power management features The power management feature set permits a host to modify the behavior in a manner which reduces the power required to operate. The power management feature set provides a set of commands and a timer that enables a device to implement low power consumption modes.
Page 99: Interface Capability For Power Modes
10.6.4 Interface capability for power modes Each power mode affects the physical interface as defined in the following table: Table 57: Power conditions Mode Interface active Media Active Active Idle Active Standby Inactive Sleep Inactive Ready (RDY) is not a power condition. A device may post ready at the interface even though the media may not be accessible.
Page 100: S.m.a.r.t. Function
10.7 S.M.A.R.T. Function The intent of Self-monitoring, analysis, and reporting technology (S.M.A.R.T.) is to protect user data and prevent unscheduled system downtime that may be caused by predictable degradation and/or fault of the device. By monitoring and storing critical performance and calibration parameters, S.M.A.R.T. devices employ sophisticated data analysis algorithms to predict the likelihood of near-term degradation or fault condition.
Page 101: Error Log
10.7.7 Error log Logging of reported errors is supported. The device provides information on the last five errors that the device reported as described in the SMART error log sector. The device may also provide additional vendor specific information on these reported errors. The error log is not disabled when SMART is disabled. Disabling SMART disables the delivering of error log information via the SMART READ LOG SECTOR command.
Page 102: Security Mode Feature Set
10.8 Security Mode Feature Set Security Mode Feature Set is a powerful security feature. With a device lock password, a user can prevent unauthorized access to a device even if it is removed from the computer. New commands are supported for this feature as listed below: Security Set Password ('F1'h) Security Unlock...
Page 103: Passwords
10.8.3 Passwords This function can have two types of passwords as described below. Master Password When the Master Password is set, the device does NOT enable the Device Lock Function, and the device CANNOT be locked with the Master Password, but the Master Password can be used for unlocking the locked device.
Page 104 10.8.4.3 Operation from POR after user password is set When Device Lock Function is enabled, the device rejects media access command until a Security Unlock command is successfully completed. Device Locked mode Unlock CMD Erase Prepare Media Access Non-media Access Command (*1) Command (*1) Erase Unit...
Page 105: User Password Lost
10.8.4.4 User Password lost If the User Password is forgotten and High level security is set, the system user cannot access any data. However the device can be unlocked using the Master Password. If a system user forgets the User Password and Maximum security level is set, data access is impossible. However the device can be unlocked using the Security Erase Unit command to unlock the device and erase all user data with the Master Password.
Page 106: Command Table
10.8.5 Command table This table shows the device's response to commands when the Security Mode Feature Set (Device lock function) is enabled. Table 58: Command table for device lock operation Device Mode Device Mode Command Command Locked Unlocked Frozen Locked Unlocked Frozen Check Power Mode...
Page 107: Host Protected Area Feature
10.9 Host Protected Area Feature Host Protected Area Feature provides a protected area which cannot be accessed via conventional methods. This protected area is used to contain critical system data such as BIOS or system management information. The contents of the main memory of the entire system may also be dumped into the protected area to resume after a system power off.
Page 108: Security Extensions
3. Conventional usage without system software support Since the drive works as a 6.2 GB device, there is no special care required for normal use of this device. 4. Advanced usage using protected area The data in the protected area is accessed by the following steps. i.
Page 109: Seek Overlap
10.10 Seek overlap The Deskstar T7K250 provides an accurate method for measuring seek time. The seek command is usually used to measure the device seek time by accumulating the execution time for a number of seek commands. With typical implementation of seek command this measurement must include the device and host command overhead. To eliminate this overhead the drive overlaps the seek command as described below.
Page 110: Write Cache Function
10.11 Write cache function Write cache is a performance enhancement whereby the device reports the completion of the write command (Write Sectors, Write Multiple, and Write DMA) to the host as soon as the device has received all of the data into its buffer. The device assumes the responsibility for subsequently writing the data onto the disk.
Page 111: Reassign Function
10.12 Reassign function The Reassign function is used with read commands and write commands. The sectors of data for reassignment are prepared as the spare data sector. This reassignment information is registered internally and the information is available right after completing the Reassign function.
Page 112: Power-Up In Standby Feature Set
10.13 Power-Up in Standby feature set The Power-Up In Standby feature set allows devices to be powered-up into the Standby power management state to minimize inrush current at power-up and to allow the host to sequence the spin-up of devices. This feature set will be enabled and disabled via the SET FEATURES command or the use of a jumper.
Page 113: Advanced Power Management Feature Set (Apm)
10.14 Advanced Power Management feature set (APM) This feature allows the host to select an advanced power management level. The advanced power management level is a scale from the lowest power consumption setting of 01h to the maximum performance level of FEh. Device performance may increase with increasing advanced power management levels.
Page 114: Automatic Acoustic Management Feature Set (Aam)
10.15 Automatic Acoustic Management feature set (AAM) This feature set allows the host to select an acoustic management level. The acoustic management level ranges from the setting of 80h to FEh. Device performance and acoustic emanation may increase with increasing acoustic management levels.
Page 115: Address Offset Feature
10.16 Address Offset Feature Computer systems perform initial code loading (booting) by reading from a predefined address on a drive. To allow an alternate bootable operating system to exist in a system reserved area on a drive, this feature provides a Set Features function to temporarily offset the drive address space.
Page 116: Identify Device Data
10.16.2 Identify Device Data Identify Device data, word 83, bit 7 indicates the device supports the Address Offset Feature. Identify Device data, word 86, bit 7 indicates the device is in Address Offset mode. 10.16.3 Exceptions in Address Offset Mode Any commands which access sectors across the original native maximum LBA are rejected with error, even if the access protection is removed by a Set Max Address command.
Page 117: Bit Address Feature Set
10.17 48-bit Address Feature Set The 48-bit Address feature set allows devices with capacities up to 281,474,976,710,655 sectors. This allows device capacity up to 144,115,188,075,855,360 bytes. In addition, the number of sectors that may be transferred by a single command are increased by increasing the allowable sector count to 16 bits. Commands unique to the 48-bit Address feature set are •...
Page 118: Streaming Commands
• Write Stream PIO • Read Stream DMA • Write Stream DMA • Read Log Ext Support of the Streaming feature set is indicated in Identify Device work 84 bit 4. Note that PIO versions of these commands limit the transfer rate (16.6 MB/s), provide no CRC protection, and limit status reporting as compared to a DMA implementation.
Page 119 10.18.1.4 Read Continuous bit If the Read Continuous bit is set to one for the command, the device shall transfer the requested amount of data to the host within the Command Completion Time Limit even if an error occurs. The data sent to the host by the device in an error condition is vendor specific.
Page 120 Deskstar T7K250 Hard Disk Drive Specification...
Page 121: Pio Data In Commands
11.0 Command protocol The commands are grouped into different classes according to the protocols followed for command execution. The command classes with their associated protocols are defined below. For all commands, the host must first check to see if BSY = 1, and should proceed no further unless and until BSY = 0.
Page 122: Pio Data Out Commands
e. The host reads one sector (or block) of data via the Data Register. f. The device sets DRQ = 0 after the sector (or block) has been transferred to the host. 4. For the Read Long command: a. The device sets BSY = 1 and prepares for data transfer. b.
Page 123 • Write Multiple Ext • Write Sector(s) • Write Sector(s) Ext Execution includes the transfer of one or more 512 byte (> 512 bytes on Write Long) sectors of data from the host to the device. 1. The host writes any required parameters to the Features, Sector Count, Sector Number, Cylinder, and Device/Head Registers.
Page 124: Non-Data Commands
11.3 Non-data commands The following are Non-data commands: • Check Power Mode • Device Configuration FREEZE LOCK • Device Configuration RESTORE • Execute Device Diagnostic • Flush Cache • Flush Cache Ext • Idle • Idle Immediate • Initialize Device Parameters •...
Page 125: Dma Commands
11.4 DMA commands The following are DMA commands: • Read DMA • Read DMA Ext • Write DMA • Write DMA Data transfers using DMA commands differ in two ways from PIO transfers: • Data transfers are performed using the Slave DMA channel •...
Page 126: Dma Queued Commands
11.5 DMA queued commands DMA queued commands are • Read DMA Queued • Read DMA Queued Ext • Service • Write DMA Queued • Write DMA Queued Ext 1. Command Issue a. the host writes any required parameters to the Features, Sector Count, Sector Number, Cylinder, and Device/Head registers.
Page 127: Table 58.Command Set (1 Of 2)
12.0 Command descriptions The table below shows the commands that are supported by the device. Table 61: “Command Set (subcommand)” on page 115 shows the subcommands that are supported by each command or feature. Table 59: Command Set (1 of 2) Code Binary Code Bit Protocol...
Page 128: Table 59.Command Set (2 Of 2)
Table 60: Command Set (2 of 2) Binary Code Bit Protocol Command Code (Hex) 7 6 5 4 3 2 1 0 Security Freeze Lock 1 1 1 1 0 1 0 1 Security Set Password 1 1 1 1 0 0 0 1 Security Unlock 1 1 1 1 0 0 1 0 Seek...
Page 129: Table 60.Command Set (Subcommand)
2 : PIO data OUT command 3 : Non data command 4 : DMA command Table 61: Command Set (subcommand) Command Feature Command (Subcommand) Code (Hex) Register (Hex) S.M.A.R.T. Function S.M.A.R.T. Read Attribute Values S.M.A.R.T. Read Attribute Thresholds S.M.A.R.T. Enable/Disable Attribute Autosave S.M.A.R.T.
Page 130 The following symbols are used in the command descriptions. Output registers This indicates that the bit must be set to 0. This indicates that the bit must be set to 1. The device number bit. Indicates that the device number bit of the Device/Head Register should be specified. Zero selects the master device and one selects the slave device.
Page 131: Table 62.Check Power Mode Command (E5H/98H)
12.1 Check Power Mode (E5h/98h) Table 62: Check Power Mode command (E5h/98h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 132: Device Configuration Overlay (B1H)
12.2 Device Configuration Overlay (B1h) Table 63: Check Power Mode Command (E5h/98h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 133: Device Configuration Set (Subcommand C3H)
12.2.3 DEVICE CONFIGURATION IDENTIFY (subcommand C2h) The DEVICE CONFIGURATION IDENTIFY command returns a 512 byte data structure via PIO data-in transfer. The content of this data structure indicates the selectable commands, modes, and feature sets that the device is capable of supporting. If a DEVICE CONFIGURATION SET command has been issued reducing the capabilities, the response to an IDENTIFY DEVICE or IDENTIFY PACKET DEVICE command will reflect the reduced set of capabilities, while the DEVICE CONFIGURATION IDENTIFY command will reflect the entire set of selectable capabilities.
Page 134 Table 65: Device Configuration Overlay Data structure Word Content 0001h Data Structure revision Multiword DMA modes supported 15-3 Reserved 1 = Multiword DMA mode 2 and below are supported 1 = Multiword DMA mode 1 and below are supported 1 = Multiword DMA mode 0 is supported Ultra DMA modes supported 15-6 Reserved...
Page 135 Table 66: DCO error information definition Cylinder high invalid word location Cylinder low invalid bit location (bits 7:0) Sector Number Invalid bit location (bits 15:8) error reason code description DCO feature is frozen Device is now Security Locked mode Device's feature is already modified with DCO User attempt to disable any feature enabled Sector count Device is now SET MAX Locked or Frozen mode...
Page 136: Execute Device Diagnostic (90H)
12.3 Execute Device Diagnostic (90h) Table 67: Execute Device Diagnostic command (90h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 137: Flush Cache (E7H)
12.4 Flush Cache (E7h) Table 68: Flush Cache command (E7h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 138: Flush Cache Ext (Eah)
12.5 Flush Cache Ext (EAh) Table 69: Flush Cache Ext Command (EAh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 139: Format Track (50H)
12.6 Format Track (50h) Table 70: Format Track command (50h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 140: Format Unit (F7H)
12.7 Format Unit (F7h) Table 71: Format Unit command (F7h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 141: Identify Device (Ech)
12.8 Identify Device (ECh) Table 72: Identify Device command (ECh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 142 Table 73: Identify device information (Part 1 of 7) An asterisk (*) in next to the Content field indicates the use of those parameters that are vendor specific. Word Content Description 045AH or drive classi- bit assignments 045Eh fication 15(=0) 1=ATAPI device, 0=ATA device 14 - 8 retired...
Page 143: Table 73.Identify Device Information (Part 2 Of 7)
Table 74: Identify device information (Part 2 of 7) An asterisk (*) in next to the Content field indicates the use of those parameters that are vendor specific Word Content Description 0000H Reserved XF00H Capabilities, bit assignments: 15-14(=0) Reserved Standby timer (=1) Values as specified in ATA standard are supported (=0)
Page 144 Table 75: Identify device information (Part 3 of 7) Word Content Description 0003H Flow Control PIO Transfer Modes Supported 15- 8(=0) Reserved 7- 0(=3) Advanced PIO Transfer Modes Supported '11' = PIO Mode 3 and 4 Supported 0078H Minimum Multiword DMA Transfer Cycle Time Per Word 15- 0(=78h) Cycle time in nanoseconds (120 ns, 16.6 MB/s) 0078H Manufacturer's Recommended Multiword DMA Transfer Cycle Time...
Page 145 007CH Major version number 15- 0 (=7C) ATA-2,ATA-3,ATA/ATAPI-4,ATA/ATAPI-5,ATA/ATAPI-6 0019H Minor version number 15- 0 (=19) ATA/ATAPI-6 T13 14100 Revision 3a 74EBH Command set supported 15(=0) Reserved 14(=1) NOP command 13(=1) READ BUFFER command 12(=1) WRITE BUFFER command 11(=0) Reserved 10(=1) Host Protected Feature set 9(=0) DEVICE RESET command...
Page 146: Table 75.Identify Device Information (Part 4 Of 7)
Table 76: Identify device information (Part 4 of 7) Word Content Description 7BEAH Command set supported 15-14 Word 83 is valid 13(=1) FLUSH CACHE EXT command supported 12(=1) FLUSH CACHE command supported 11(=1) Device Configuration Overlay command supported 10(=1) 48-bit Address Feature Set supported 9(=1) Automatic Acoustic mode 8(=1)
Page 147: Table 76.Identify Device Information
Table 77: Identify device information (Part 5 of 7 Word Content Description XXXXH Command set supported 15-14 Reserved FLUSH CACHE EXT command supported FLUSH CACHE command supported Device Configuration Overlay command supported 48-bit Address Feature Set supported Automatic Acoustic Management enabled SET Max Security extension enabled Set Features Address Offset Feature mode Set Features subcommand required to spin-up after...
Page 148: Table 77.Identify Device Information (Part 6 Of 7)
Table 78: Identify device information (Part 6 of 7) Word Content Description XXXXH Hardware reset result. Bit assignments 15-14 (=01) Word 93 is valid CBLID- status 1=above Vih 0=below Vil 12- 8 Device 1 hardware reset result Device 0 clear these bits to 0 Reserved PDIAG- assertion 1 = asset 0 = not assert...
Page 149: Table 78.Identify Device Information (Part 7 Of 7)
Table 79: Identify device information (Part 7 of 7) An asterisk (*) in next to the Content field indicates the use of those parameters that are vendor specific Word Content Description XXXXH * Current Set Feature Option. Bit assignments 15-4 Reserve Auto reassign 1= enabled...
Page 150: Idle (E3H/97H)
12.9 Idle (E3h/97h) Table 80: Idle command (E3h/97h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 151: Idle Immediate (E1H/95H)
12.10 Idle Immediate (E1h/95h) Table 81: Idle Immediate command (E1h/95h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 152: Initialize Device Parameters (91H)
12.11 Initialize Device Parameters (91h) Table 82: Initialize Device Parameters command (91h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 153: Nop Command
12.12 NOP (00h) Table 83: NOP Command (00h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 154: Read Buffer Command
12.13 Read Buffer (E4h) Table 84: Read Buffer (E4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 155: Read Dma (C8H/C9H)
12.14 Read DMA (C8h/C9h) Table 85: Read DMA command (C8h/C9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 156 In LBA mode this register contains the current LBA bits 0–7. (L = 1) Cylinder High/Low This indicates the cylinder number of the last transferred sector. (L = 0). In LBA mode this register contains the current LBA bits 8–15 (Low) and bits16–23 (High).
Page 157: Table 85.Read Dma Ext Command (25H)
12.15 Read DMA Ext (25h) Table 86: Read DMA Ext Command (25h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 158 Cylinder High Previous LBA (47:40) Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24)of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8)of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32)of the address of the first unrecoverable error.
Page 159: Table 86.Read Dma Command (C8H/C9H)
12.16 Read DMA Queued (C7h) Table 87: Read DMA command (C8h/C9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 160 Input parameters from the device on command complete Sector Count Bits 7 - 3 (Tag) contain the Tag of the completed command. Bit 2 (REL) is cleared to zero. Bit 1 (I/O) is set to one. Bit 0 (C/D) is set to one. Sector Number, Cylinder High/Low, H Sector address of unrecoverable error (applicable only when an unrecoverable error has occurred.) Cleared to zero...
Page 161: Table 87.Read Dma Ext Command (25H)
12.17 Read DMA Queued Ext (26h) Table 88: Read DMA Ext Command (25h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 162 Input parameters from the device on bus release Sector Count (HOB=0) Bits 7 - 3 (Tag) contain the Tag of the completed command. Bit 2 (REL) is cleared to zero. Bit 1 (I/O) is set to one. Bit 0 (C/D) is set to one. Sector Number, Cylinder High/Low n/a Cleared to zero when the device performs a bus release.
Page 163: Read Log Ext (2Fh)
12.18 Read Log Ext (2Fh) Table 89: Read Log Ext Command (2Fh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 164: General Purpose Log Directory
Table 90: Log Address Definition Log Address Content Feature set Type Log directory Read Only Extended Comprehensive SMART error log SMART error logging Ready Only SMART self-test log SMART self-test See Note Extended SMART self-test log SMART self-test Read Only 80h-9Fh Host vendor specific SMART...
Page 165: Extended Comprehensive Smart Error Log
12.18.2 Extended Comprehensive SMART Error Log The figure below defines the format of each of the sectors that comprise the Extended Comprehensive SMART error log. Error log data structure shall not include errors attributed to the receipt of faulty commands such as com- mand codes not implemented by the device or requests with invalid parameters or in valid addresses.
Page 166 12.18.2.3.2 Data format of command data structure Table 94: Command data structure Description Bytes Offset Device Control register Features register (7:0) (see Note) Features register (15:8) Sector count register(7:0) Sector count register(15:8) Sector number register(7:0) Sector number register(15:8) Cylinder Low register (7:0) Cylinder Low register (15:8) Cylinder High register (7:0) Cylinder High register (15:8)
Page 167: Extended Self-Test Log Sector
Note: bits (7:0) refer to the contents if the register is read with bit 7 of the Device Control register cleared to zero. Bits (15:8) refer to the contents if the register is read with bit 7 of the Device Control register set to one. State shall contain a value indicating the state of the device when the command was issued to the device or the reset occurred as described below.
Page 168 12.18.3.1 Self-test log data structure revision number The value of this revision number shall be 01h. 12.18.3.2 Self-test descriptor index This indicates the most recent self-test descriptor. If there have been no self-tests, this is set to zero. Valid values for the Self-test descriptor index are 0 to 18.
Page 169: Read Long (22H/23H)
12.19 Read Long (22h/23h) Table 96: Read Long (22h/23h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 170 In LBA mode, this register contains current LBA bits 0–7. (L = 1) Cylinder High/Low This indicates the cylinder number of the transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 8–15 (Low), 16–23 (High). (L = 1) This indicates the head number of the transferred sector.
Page 171: Read Multiple (C4H)
12.20 Read Multiple (C4h) Table 97: Read Multiple (C4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 172 This indicates the head number of the transferred sector. (L = 0) In LBA mode, this register contains current LBA bits 24–27. (L = 1) Deskstar T7K250 Hard Disk Drive Specification...
Page 173: Read Multiple Ext (29H)
12.21 Read Multiple Ext (29h) Table 98: Read DMA Ext Command (25h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 174 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 175: Read Native Max Address (F8H)
12.22 Read Native Max ADDRESS (F8h) Table 99: Read Native Max ADDRESS (F8h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - -...
Page 176: Read Native Max Address Ext (27H)
12.23 Read Native Max Address Ext (27h) Table 100: Read Native Max Address Ext command (27h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low...
Page 177: Read Sectors (20H/21H)
12.24 Read Sectors (20h/21h) Table 101: Read Sectors Command (20h/21h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 178 Cylinder High/Low This is the cylinder number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 8–15 (Low) and bits 16–23 (High). (L = 1) This is the head number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 24–27.
Page 179: Read Sector(S) Ext (24H)
12.25 Read Sector(s) Ext (24h) Table 102: Read Sector(s) Ext command (24h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 180 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 181: Read Stream Dma Ext (2Ah)
12.26 Read Stream DMA Ext (2Ah) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 182 URG (bit 7) URG specifies an urgent transfter request. The Urgent bit specifies that the command should be completed in the minimum possible time by the device and shall be completed within the specified Command Completion Time Limit. RC(bit 6) RC specifies Read Continuous mode enabled.
Page 183 Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=1)LBA (39:32) of the address of the first unrecoverable error. Cylinder Low (HOB=0)LBA (23:16) of the address of the first unrecoverable error. Cylinder High (HOB=0) LBA (23:16) of the address of the first unrecoverable error. Cylinder High (HOB=1) LBA (47:40) of the address of the first unrecoverable error.
Page 184: Read Stream Pio (2Bh)
12.27 Read Stream PIO (2Bh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 185 URG (bit 7) URG specifies an urgent transfter request. The Urgent bit specifies that the command should be completed in the minimum possible time by the device and shall be completed within the specified Command Completion Time Limit. RC(bit 6) RC specifies Read Continuous mode enabled.
Page 186 Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=1)LBA (39:32) of the address of the first unrecoverable error. Cylinder Low (HOB=0)LBA (23:16) of the address of the first unrecoverable error. Cylinder High (HOB=0) LBA (23:16) of the address of the first unrecoverable error. Cylinder High (HOB=1) LBA (47:40) of the address of the first unrecoverable error.
Page 187: Read Verify Sectors (40H/41H)
12.28 Read Verify Sectors (40h/41h) Table 103: Read Verify Sectors (40h/41h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 188 In LBA mode this register contains the current LBA bits 8–15 (Low) and bits 16–23 (High). (L = 1) This is the head number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 24–27. (L = 1) Deskstar T7K250 Hard Disk Drive Specification...
Page 189: Read Verify Sector(S) (42H)
12.29 Read Verify Sector(s) (42h) Table 104: Read Verify Sector(s) command (42h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - -...
Page 190 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 191: Recalibrate (1Xh)
12.30 Recalibrate (1xh) Table 105: Recalibrate (1xh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 192: Reserved
12.31 Security Disable Password (F6h) Table 106: Security Disable Password (F6h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 193: Security Disable Password (F3H)
12.32 Security Disable Password (F3h) Table 108: Security Disable Password (F3h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 194: Security Erase Unit (F4H)
12.33 Security Erase Unit (F4h) Table 109: Security Erase Unit (F4h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 195 If the device receives a Security Erase Unit command without a prior Security Erase Prepare command the device aborts the security erase unit command. This command disables the security mode feature (device lock function), however, the master password is still stored internally within the device and may be reactivated later when a new user password is set.
Page 196: Security Freeze Lock (F5H)
12.34 Security Freeze Lock (F5h) Table 111: Security Freeze Lock command (F5h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 197: Security Set Password (F1H)
12.35 Security Set Password (F1h) Table 112: Security Set Password command (F1h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 198 Security Level Zero indicates High level. One indicates Maximum level. If the host sets High level and the password is forgotten, the Master Password can be used to unlock the device. If the host sets Maximum level and the user password is for- gotten, only a Security Erase Prepare/Security Unit command can unlock the device and all data will be lost.
Page 199: Security Unlock (F2H)
12.36 Security Unlock (F2h) Table 114: Security Unlock command (F2h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 200: Seek (7Xh)
12.37 Seek (7xh) Table 115: Seek command (7xh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 201: Service Interrupt
12.38 Service (A2h) Table 116: Service command (A2h) Command Block Output Registers Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Feature - - - - - - - - Sector Count - - - - - - - - Sector Number - - - - - - - -...
Page 202: Set Features (Efh)
12.39 Set Features (EFh) Table 117: Set Features command (EFh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 203: Release Interrupt
Note: After the power on reset or hard reset the device is set to the following features as default. Write cache Enable ECC bytes 4 bytes Read look-ahead Enable Reverting to power on defaults Disable Release interrupt Disable 12.39.1 Set Transfer mode When the Feature register is 03h (= Set Transfer mode) the Sector Count Register specifies the transfer mechanism.
Page 204: Automatic Acoustic Management
120 ☯y ☯435 [sec] (default: 120 [sec]) = (x − 40h) 60 +600 (600 ☯y ☯4380) [sec] When Low RPM standby mode is the deepest Power Saving Mode and the value in Sector Count register is between 01h and 3Fh, where 120 ☯y ☯435...
Page 205: Set Max Address (F9H)
12.40 Set Max ADDRESS (F9h) Table 118: Set Max ADDRESS command (F9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 206 If a host protected area has been established by a Set Max Address Ext command, the device shall return command aborted. Output parameters to the device Option bit for selection whether nonvolatile or volatile. B = 0 is volatile condition. When B=1, MAX LBA/CYL which is set by Set Max LBA/CYL command is preserved by POR.
Page 207: Set Max Set Password (Feature=01H)
12.40.1 Set Max Set Password (Feature=01h) Table 119: Set Max Set Password command Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - -...
Page 208: Set Max Lock (Feature=02H)
12.40.2 Set Max Lock (Feature=02h) Table 121: Set Max Lock command Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 209: Set Max Unlock (Feature = 03H)
12.40.3 Set Max Unlock (Feature = 03h) Table 122: Set Max Unlock command (F9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data...
Page 210: Set Max Freeze Lock (Feature = 04H)
12.40.4 Set Max Freeze Lock (Feature = 04h) Table 123: Set Max Freeze Lock (F9h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data...
Page 211: Set Max Address Ext (37H)
12.41 Set Max Address Ext (37h) Table 124: Set Max Address Ext command (37h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low...
Page 212 Output parameters to the device Option bit for selection whether nonvolatile or volatile. B=0 is volatile condition. When B=1, MAX Address which is set by the Set Max Address Ext command is pre- served by POR. When B=0, MAX Address which is set by the Set Max Address Ext com- mand will be lost by POR.
Page 213: Sleep (E6H/99H)
12.42 Sleep (E6h/99h) Table 125: Sleep command (E6h/99h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 214: S.m.a.r.t. Function Set (B0H)
12.43 S.M.A.R.T. Function Set (B0h) Table 126: S.M.A.R.T. Function Set command (B0h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 215 12.43.1.2 S.M.A.R.T. Read Attribute Thresholds (subcommand D1h) This subcommand returns the Attribute Thresholds of the device to the host. Upon receipt of the SMART Read Attribute Thresholds subcommand from the host, the device reads the Attribute Thresholds from the Attribute Threshold sectors and then transfers the 512 bytes of Attribute Thresholds information to the host.
Page 216: Device Attribute Data Structure
host within two seconds after receipt of the new command. After servicing the interrupting command, the device will resume its routine automatically or not start its routine depending on the interrupting command. Captive mode: When executing self-test in captive mode, the device sets BSY to one and executes the specified self-test routine after receipt of the command.
Page 217 Upon receipt of the S.M.A.R.T. Disable Operations subcommand from the host, the device asserts BSY, disables S.M.A.R.T. capabilities and functions, clears BSY, and asserts INTRQ. After receipt of the device of the S.M.A.R.T. Disable Operations subcommand from the host, all other S.M.A.R.T. subcommands—with the exception of S.M.A.R.T.
Page 218: Device Attribute Data Structure
12.43.2 Device Attribute Data Structure The following defines the 512 bytes that make up the Attribute Value information. This data structure is accessed by the host in its entirety using the S.M.A.R.T. Read Attribute Values subcommand. All multibyte fields shown in these data structures are in byte ordering, that is, the least significant byte occupies the lowest numbered byte address location in the field.
Page 219 Attribute ID Numbers: Any nonzero value in the Attribute ID Number indicates an active attribute. The device supports following Attribute ID Numbers. Attribute Name Indicates that this entry in the data structure is not used Raw Read Error Rate Throughput Performance Spin Up Time Start/Stop Count Reallocated Sector Count...
Page 220 Automatic Off-line Data Collection is enabled. Bits 0–6 represent a hexadecimal status value reported by the device. Value Definition Off-line data collection never started. All segments completed without errors. Off-line data collection is suspended by the interrupting command. Off-line data collecting is aborted by the interrupting command. Off-line data collection is aborted with a fatal error.
Page 221: Device Attribute Thresholds Data Structure
Off-line Read Scanning implemented bit The device does not support Off-line Read Scanning The device supports Off-line Read Scanning Self-test implemented bit Self-test routing is not implemented Self-test routine is implemented Reserved (0) 12.43.2.7 S.M.A.R.T. Capability This word of bit flags describes the S.M.A.R.T. capabilities of the device. The device will return 03h indicating that the device will save its Attribute Values prior to going into a power saving mode and supports the S.M.A.R.T.
Page 222 The sequence of active Attribute Thresholds will appear in the same order as their corresponding Attribute Values. Table 129: Device Attribute Thresholds Data Structure Description Byte Offset Value Data Structure Revision Number 0010h 1st Device Attribute 30th Device Attribute 15Eh Reserved 16Ah Vendor specific...
Page 223: S.m.a.r.t. Log Directory
12.43.4 S.M.A.R.T. Log Directory The following table defines the 512 bytes that make up the S.M.A.R.T. Log Directory. The S.M.A.R.T. Log Direc- tory is S.M.A.R.T. Log Address zero and is defined as one sector long. Table 131: S.M.A.R.T. Log Directory Description Byte Offset...
Page 224 12.43.5.4 Error log data structure The data format of each error log data structure is shown below. Table 133: Error log data structure Description Byte Offset 1st command data structure 2nd command data structure 3rd command data structure 4th command data structure 5th command data structure Error data structure 12.43.5.5 Command data structure...
Page 225: Self-Test Log Data Structure
The state field contains a value indicating the device state when command was issued to the device. Value State Unknown Sleep Standby Active/Idle S.M.A.R.T. Off-line or Self-test x5h-xAh Reserved xBh-xFh Vendor specific The value of ’x’ is vendor specific 12.43.6 Self-test log data structure The following table defines the 512 bytes that make up the Self-test log sector.
Page 226: Error Reporting
12.43.7 Error reporting The following table shows the values returned in the Status and Error Registers when specific error conditions are encountered by a device. Table 137: S.M.A.R.T. Error Codes Error condition Status Register Error Register A S.M.A.R.T. FUNCTION SET command was received by the device without the required key being loaded into the Cylinder High and Cylinder Low registers.
Page 227: Standby (E2H/96H)
12.44 Standby (E2h/96h) Table 138: Standby (E2h/96h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 228: Standby Immediate (E0H/94H)
12.45 Standby Immediate (E0h/94h) Table 139: Standby Immediate (E0h/94h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 229: Write Buffer (E8H)
12.46 Write Buffer (E8h) Table 140: Write Buffer (E8h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 230: Write Dma Queued (Cah/Cbh)
12.47 Write DMA Queued (CAh/CBh) Table 141: Write DMA Queued Command CAh/CBh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 231 Input parameters from the device on command complete Sector Count Bits 7 - 3 (Tag) contain the Tag of the completed command. Bit 2 (REL) is cleared to zero. Bit 1 (I/O) is set to one. Bit 0 (C/D) is set to one. Sector Number, Cylinder High/Low, H Sector address of unrecoverable error (applicable only when an unrecoverable error has occurred).
Page 232: Write Dma Fua Ext (3Dh)
12.48 Write DMA FUA Ext (3Dh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 233 Cylinder High PreviousLBA (47:40) Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error Cylinder Low(HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 234: Write Dma Ext (35H)
12.49 Write DMA Ext (35h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 235 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error Cylinder Low(HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 236: Write Fpdma Queued (61H)
12.50 Write FPDMA Queued (61h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 237 FUA (bit 7) When the FUA bit is set to 1, the completion status is indicated after the trans- ferred data are written to the media also when Write Cache is enabled. When the FUA bit is set to 0, the completion status may be indicated before the transferred data are written to the media successfully when Write Cache is enabled.
Page 238: Write Log Ext (3Fh)
12.51 Write Log Ext (3Fh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 239: Write Long (32H/33H)
12.52 Write Long (32h/33h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
Page 240 This indicates the head number of the sector to be transferred. (L = 0) In LBA mode this register contains current the LBA bits 24–27. (L = 1) The drive internally uses 52 bytes of ECC on all data read or writes. The 4-byte mode of operation is provided by means of an emulation technique.
Page 241: Write Multiple (C5H)
12.53 Write Multiple (C5h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature - - - - - - - -...
Page 242: Write Multiple Ext (39H)
12.54 Write Multiple Ext (39h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 243 Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error. Cylinder High (HOB=0) LBA (23:16) of the address of the first unrecoverable error.
Page 244: Write Multiple Fua Ext (Ceh)
12.55 Write Multiple FUA Ext (CEh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 245 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 246: Write Sectors (30H/31H)
12.56 Write Sectors (30h/31h) Table 142: Write Sectors command (30h/31h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data - - - - - - - - Data - - - - - - - - Feature...
Page 247 In LBA mode this register contains the current LBA bits 8–15 (Low) and 16–23 (High). (L = 1) This indicates the head number of the last transferred sector. (L = 0) In LBA mode this register contains the current LBA bits 24–27. (L = 1) Deskstar T7K250 Hard Disk Drive Specification...
Page 248: Write Sector(S) (34H)
12.57 Write Sector(s) (34h) Table 143: Write Sector(s) Command (34h) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 249 Input parameters from the device Sector Number (HOB=0) LBA (7:0) of the address of the first unrecoverable error. Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error.
Page 250: Write Stream Dma (3Ah)
12.58 Write Stream DMA (3Ah) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 251 If the WC bit is set to one and errors occur in transfer or writing of the data, the device shall continue to transfer the amount of data requested and then provide ending status with BSY bit cleared to zero, the SE bit set to one, the ERR bit cleared to zero, and the type of error, ICRC, IDNF or ABRT reported in the error log.
Page 252 Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error. Cylinder High (HOB=0) LBA (23:16) of the address of the first unrecoverable error. Cylinder High (HOB=1) LBA (47:40) of the address of the first unrecoverable error.
Page 253: Write Stream Pio (3Bh)
12.59 Write Stream PIO (3Bh) Command Block Output Registers Command Block Input Registers Register 7 6 5 4 3 2 1 0 Register 7 6 5 4 3 2 1 0 Data Low - - - - - - - - Data Low - - - - - - - - Data High...
Page 254 If the WC bit is set to one and errors occur in transfer or writing of the data, the device shall continue to transfer the amount of data requested and then provide ending status with BSY bit cleared to zero, the SE bit set to one, the ERR bit cleared to zero, and the type of error, ICRC, IDNF or ABRT reported in the error log.
Page 255 Sector Number (HOB=1) LBA (31:24) of the address of the first unrecoverable error. Cylinder Low (HOB=0) LBA (15:8) of the address of the first unrecoverable error. Cylinder Low (HOB=1) LBA (39:32) of the address of the first unrecoverable error. Cylinder High (HOB=0) LBA (23:16) of the address of the first unrecoverable error.
Page 256 Deskstar T7K250 Hard Disk Drive Specification...
Page 257: Time-Out Values
13.0 Time-out values The timing of BSY and DRQ in Status Register are shown in the table below. Table 144: Time-out values INTERVAL START STOP TIME-OUT Power On Device Busy After Power On Status Register BSY=1 400 ns Power On Device Ready After Power On Status Register BSY=1...
Page 258 Deskstar T7K250 Hard Disk Drive Specification...
Page 259 Index 48-bit Address Feature ....................103 Abbreviations ........................1 Acoustics .........................65 Actuator ..........................9 Address Offset ........................101 Advanced Power Managemen ..................99 Automatic Acoustic Management ..................100 BSMI mark ........................67 Cable noise interference ....................57 Cabling ..........................43 Capacity, formatted ......................11 Caution ..........................3 CE mark ..........................67 Command descriptions ....................113 Command overhead ......................15 Command protocol ......................107 Command table .......................92...
Page 260 DMA commands ......................111 DMA Data Transfer commands ..................111 Drive characteristics .......................11 Drive format ........................13 Drive ready time ......................17 Electrical interface ......................23 Electromagnetic compatibility ..................66, 67 Environment ........................53 Fixed-disk subsystem ......................9 Flammability ........................66 Flush Cache ........................123 Formatted capacity ......................11 Functional specification ....................7 General ..........................1 General features ......................5 Head disk assembly ......................9...
Page 261 Labels, Identification ......................65 Latency, average ......................17 Load/unload ........................57 Mechanical specifications ....................58 Mode transition time .......................20 Mounting hole locations ....................59 Mounting orientation ......................60 Non-data commands .......................110 Operating modes ......................20 description 18 Operating shock ......................63 Packaging ........................67 Passwords ........................89 Performance characteristics ....................15 Physical dimensions ......................58 PIO timings ........................32 Power consumption effiency ..................56...
Page 262 S.M.A.R.T. Function Set ....................199 Safety ..........................66 Secondary circuit protection ...................66 Sector Addressing ......................82 Security Mode Feature Set ....................88 Shock ..........................62 Signal definitions ......................25 Specification ........................47 Temperature ........................53 Time-out values ......................241 Timings multi word DMA 34 reset 29 Ultra DMA 35 UL approval ........................66 Vibration .........................62 Weight ..........................58...
Page 263 References in this publication to Hitachi Global Storage Technologies products, programs or services do not imply that Hitachi Global Storage Technologies intends to make these available in all countries in which Hitachi Global Storage Technologies operates. Product information is provided for information pur- poses only and does not constitute a warranty.

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Hitachi T7K250 - Deskstar - Hard Drive Specifications

Table of Contents

8 General

2 General Features of the Drive

3 Fixed-Disk Subsystem Description

4 Drive Characteristics

5 Defect Flagging Strategy

6 Electrical Interface Specification

7 Specification

10 General Operation

11 Command Protocol

12 Command Descriptions

Table 75.Identify Device Information (Part 4 of 7)

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