Table of Contents
CIRCUIT DESCRIPTION
2. Microprocessor 1. PD7538AC-041 (X11-2650-10 : IC1)
Terminal connection diagram & key matrix connection
KR-A4010
Lil
| | Reset
ves
2
2
4!
|
|-=e
cli
POO/INTO
33
Ca
|
vest
PO3/S!
(vem)
AUTO STEREO
P53
P30
or
PHONO/MAIN
2 P52
P31
>
SUB
<7
PSI
P32
Pe
(1) (>)
MUTE
P50
P33
od
ap
- ee?
bae
~ © | SEG
P40
CX7925S
!
j
A
CLK
3
P2I7POUT
P42
=
9
coveann
«<2
Pi03
P43
=
a
>h
pai
Tuner
«<4
pioz
P80
i!
i
5
i5
28
VIDEO/TEST
<=
PIO!
Pal
fo
|
TAPE/Bilingual
=
P100
P82
=
2
ae
|
To
$0
8
PUB
(ee
P83
25
3 | Grip
la >t
Video
(co)
CE
Pil2
P30
4
DATA
=
PI
P9l
24
5.
BUSY
PIO
P92
6
Voo
P93
POWER
LiL
Block diagram
POO/INTO
ZERO-
CROSS
DETECTOR
CLOCK
CONTROL
TIMER/EVENT
COUNTER
INTERRUPT
CONTROL
P80
PO1/SCK
PO2/SO
SERIAL
INTERFACE
PROGRAM MEMORY
INSTRUCTION
4096x8 BITS
DECODER
SYSTEM
CLOCK
GENERATOR
STANDBY
CONTROL
CLI
CcL2
Vop
Vss_
«RESET
GENERAL REGISTERS
STACK
POINTER(8)
DATA MEMORY
160x4 BITS
Bond
Bond
fo)
|
PO3/S1
-_
Band
Band
2
"8
Vere
VioAD
| lee
POO-PO3
PORT2
LATCH
BUFFER
P2I-P23
PTOUT/P2!
LATCH
BUFFER
PORT4
K_ LATCH K 4
pao-pa3
BUFFER
PORTS
LATCH
BUFFER
PORTS
LATCH
BUFFER
PORTS
LATCH
BUFFER
| 4)
P90-P93
PORTIO
LATCH
BUFFER
K"4_) P100-P103
PORTI1
LATCH
BUFFER
K 4)
PO-PH3
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