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Page 3: Introduction
- The term “FCN-500” refers to the autonomous controllers with NFCP501/NFCP502 CPU module. - The term “FCN-RTU” refers to the low power autonomous controllers with NFCP050 CPU module. All Rights Reserved. Copyright © 2001, Yokogawa Electric Corporation TI 34P02K35-02E Jun. 6, 2018-00...
Page 4: Copyrights And Trademarks
Copyrights and Trademarks  Copyrights The copyrights of this document belong to Yokogawa Electric Corporation. No part of this document may be transferred, sold, distributed (including delivery via a commercial PC network or the like), or registered or recorded on videotapes.
Page 5: Table Of Contents
STARDOM Engineering Guide (FCN-500/FCN-RTU) TI 34P02K35-02E 3rd Edition CONTENTS Introduction ....................i Copyrights and Trademarks ..............ii CONTENTS ....................iii Overview ................... 1 Basic Design and Function Design ..........3 Checking Hardware Specification ............3 2.1.1 Current Consumption of FCN-500 and FCN-RTU Unit ....3 2.1.2 Checking Operation Specifications of I/O Modules ......
Page 6 Principles of Application Creation ............42 4.3.1 Principles of Application Creation ..........42 4.3.2 Example of a Simple Application ........... 42 4.3.3 Bottom-up Application Creation ............ 45 Application Creation Know-how ............. 46 Network Templates ................... 47 Application Encapsulation ..............48 4.6.1 Features of Application Encapsulation ..........
Page 7 Logic Designer’s Debug Mode ..............95 5.6.1 Switching to Debug Mode ............. 96 5.6.2 Basic Operation in Debug Mode ........... 99 5.6.3 Disconnecting I/O ................99 5.6.4 Entering and Checking Values of Device Label Variables ..101 Software Wiring ..................106 5.7.1 Overview of Software Wiring ............
Page 8 Precautions about Multi-tasking ............137 Criteria for Selecting Programming Languages in Logic Designer .. 141 8.4.1 Selection Criteria for FBD, LD and ST ........141 8.4.2 Selecting between FBD and LD ..........149 8.4.3 Combining FBD, LD and ST ............150 8.4.4 Selecting between SFC and Stepped FBD or LD .......
Page 9: Overview
<1. Overview> Overview STARDOM engineering can be divided into phases as shown in the diagram below. Check require- ment spec. Check requirement - Verify that the requirement specification can be implemented using spec. the STARDOM system. - Verify that the system configuration allows implementation of the Check system requirement specification.
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Page 11: Basic Design And Function Design
<2. Basic Design and Function Design> Basic Design and Function Design The first thing to do in STARDOM engineering is to check whether a given customer specification can be implemented using the hardware, application programming tools, APPFs (application portfolios), and licenses provided with the system.
Page 12 <2. Basic Design and Function Design> ● Calculating Current Consumption of an FCN Unit The current consumption of the system power supply of an FCN unit can be obtained by summing the current consumption values of the base module, as well as the CPU modules, I/O modules, and E2 bus/SB bus modules installed on the base module.
Page 13 <2. Basic Design and Function Design> Analog field power supply Current consumption of NFDV551 modules 60mA×2 = 120mA Current consumption of NFDV557 modules 60mA×2 = 120mA Total: 240mA (For digital output cards, 24Vmust be supplied to each module) SB bus repeat module does not require analog field power and are thus excluded from the calculation.
Page 14: Checking Operation Specifications Of I/O Modules
<2. Basic Design and Function Design> 2.1.2 Checking Operation Specifications of I/O Modules Compare the operation specification of each I/O module against the requirement specification to ensure that requirements can be met. For more details, see Section 8.1, "Checking Operation Specifications of I/O Modules;"...
Page 15: Measures For Duplexing
<2. Basic Design and Function Design> 2.1.4 Measures for Duplexing Within a STARDOM system, the following components can be duplexed: CPU of FCN-500 Power supply module of FCN-500 or FCN-RTU (used long base module only) SB bus of FCN-500 Control network (control LAN) of FCN-500 Communication application Check precautions described below for duplexed system components.
Page 16 <2. Basic Design and Function Design> ● FCN-500 Operation and Precautions Regarding Duplexed Control Network For details on the operation specification and precautions applicable to a STARDOM system configured with duplexed control network, see: Section D2.2.2, “Control Network Duplexed Configuration” of IM “STARDOM FCN/FCJ Guide”...
Page 17: Pre-Application Creation Checklist
<2. Basic Design and Function Design> Pre-Application Creation Checklist This section covers checking items on application programming tools, application size, etc, before creating applications. 2.2.1 Checking Revisions of FCN-500, FCN-RTU and Tools Before programming applications, check the revisions of the FCN/FCJ Basic Software and each tool to be used in subsequent engineering.
Page 18 <2. Basic Design and Function Design> ● For System Expansion STARDOM allows intermixing of FCN-500 and FCN-RTU of different revisions within a system. When implementing system expansion through addition of a new FCN-500 and FCN-RTU to an existing system, consider whether to use the latest revision for the new FCN-500 and FCN-RTU or to match the existing system revision.
Page 19 <2. Basic Design and Function Design> If you execute the plain “FcxRevup” command without the “-s" option, as is usually done when performing a revision upgrade, configuration information stored on the flash memory will be retained after command execution. This may cause an error if the existing configuration information cannot be interpreted by the older revision after system downgrade.
Page 20: Checking Fcn-500, Fcn-Rtu Control Application Size
<2. Basic Design and Function Design> 2.2.2 Checking FCN-500, FCN-RTU Control Application Size Estimate the size of an FCN500 or FCN-RTU control application from the requirement specification and ensure that there is no problem. SEE ALSO For details on how to estimate the size of an application, see Section 4.5.2, “Calculation of Control Application Capacity"...
Page 21: Checking Fcn-500, Fcn-Rtu Performance
<2. Basic Design and Function Design> 2.2.3 Checking FCN-500, FCN-RTU Performance Estimate the execution time of an FCN-500 or FCN-RTU control application from the requirement specification and determine the CPU load. SEE ALSO For details on how to estimate performance, see Section 4.5.3, “Confirmation of Performance" of TI "FCN-500 Technical Guide", Section 4.5.3, “Confirmation of Performance"...
Page 22 <2. Basic Design and Function Design> ● Recommended CPU Load The following FCN-500 and FCN-RTU functions are executed during CPU idle time: Ethernet communications of FCN-500 and FCN-RTU Communication with VDS/ASTMAC data server Inter- FCN-500 and FCN-RTU communication Various inter-device communications such as Modbus communications using Ethernet or serial communications Operation or setup from Logic Designer or Resource Configurator Duolet function...
Page 23: Determining Fcn-500, Fcn-Rtu Scan Cycle
<2. Basic Design and Function Design> 2.2.4 Determining FCN-500, FCN-RTU Scan Cycle As described in the previous section 2.2.3, “Checking FCN-500 and FCN-RTU Performance,” it is recommended that CPU load be kept at 60% or lower. Check that the estimated CPU load is 60% or lower, and there is no problem with the scan cycle stated in the requirement specification if applicable.
Page 24 <2. Basic Design and Function Design> ● Ways for Reducing CPU Load Consider the ways described below for reducing CPU load. • Lengthen the scan cycle By lengthening the scan cycle, CPU load can be reduced even if the execution time remains unchanged.
Page 25 <2. Basic Design and Function Design> ● Precautions When Using a Long Scan Cycle • When scan cycle is 4 seconds or longer Analog/digital output modules are defined with line access loss time of 4 seconds. If the scan cycle is 4 seconds or longer, the interval between FCN-500 or FCN-RTU CPU accesses of the output modules will be 4 seconds or longer.
Page 26: Retentive Variable (Retain Data) Considerations
<2. Basic Design and Function Design> 2.2.5 Retentive Variable (Retain Data) Considerations Retain data of the FCN-500 and FCN-RTU may reside in the following locations: Non-volatile memory (factory setting) Volatile memory Flash memory Based on the requirement specification, decide whether retain data is to reside in volatile memory or non-volatile memory, as well as the procedure for saving retain data to the flash memory.
Page 27 <2. Basic Design and Function Design> In subsequent description, the term "retain data on the flash memory" refers to retain data which was current as at the time when it was saved to the system card but not necessarily the most up-to- date.
Page 28 <2. Basic Design and Function Design> ● Behavior of Retain Data in FCN/FCJ Start Mode Performing offline download to FCN-500 or FCN-RTU from Logic Designer stops control on the FCN-500 or FCN-RTU. However, as power supply is not interrupted, retain data, even if resident in volatile memory, retain their data. As such, the behavior of retain data after data download in the FCN/FCJ start mode is the same regardless of whether retain data is resident in volatile or non-volatile memory.
Page 29 <2. Basic Design and Function Design> 1. In the case of 1.2 described above, the following dialog is displayed before offline download: This message indicates that warm start using retain data residing in the memory will not be possible after downloading. It does not mean that warm start, in itself, is not allowed. 2.
Page 30 <2. Basic Design and Function Design> ● Behavior of Retain Data on Online Download Even if a modification involves a change in the retain data area, persistency of retain data is guaranteed so long as the modification is online downloaded. Newly added retentive variables, however, will be set to initial values.
Page 31: Time Synchronization
<2. Basic Design and Function Design> 2.2.6 Time Synchronization The FCN-500 or FCN-RTU allows time synchronization among external devices supporting SNTP (Simple Network Time Protocol). SEE ALSO For details on time synchronization of FCN-500 or FCN-RTU, see: Section B1.9.4, “Time Synchronization Function” of IM “STARDOM FCN/FCJ Guide” Section 2.3.3, “Time Synchronization Function”...
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Page 33: Hardware Setup
It will take up to three minutes to complete the download operation. For details on the Resource Configurator and how to use the Resource Configurator Editor, read “STARDOM FCN-500/FCN-RTU Primer – Fundamental”（TI 34P02K13- 02） and the Resource Configurator online help documentation.
Page 34 <3. Hardware Setup> ● Precautions When Using FCN-500 or FCN-RTU with No Actual I/O Modules Resource configurator R4.20 or later can maintain unimplemented I/O module definition. If FCN-500 or FCN-RTU is not installed with the required I/O modules and new hardware configuration us downloaded using Resource Configurator R4.10 or earlier, existing I/O module configuration already defined will be overwritten and lost.
Page 35: Setup In Web Browser
<3. Hardware Setup> Setup in Web Browser Detailed setup and various FCN-500 or FCN-RTU operations can be achieved using FCN/FCJ maintenance homepage through a generic web browser. Among the hardware configuration items reviewed and decided as described in Chapter 2, the following items can be configured by accessing the FCN/FCJ maintenance homepage: Serial communication port Time synchronization...
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Page 37: Control Application Creation
As such, select this template only when creating an application that uses neither NPAS_POU nor PAS_POU. • STARDOM FCN-500 It is the standard template for creating control application for the FCN-500. Necessary functions for creating the control application has been prepared in advance.
Page 38 <4. Control Application Creation> • STARDOM FCX_A It is the standard template for creating control application for the FCN-RTU. Necessary functions for creating the control application has been prepared in advance. (NPAS_POU, serial communication function block, function block for Foundation Fieldbus, Turbomashinary, etc.) If necessary, it is possible to add other library after creating a project.
Page 39: Control Task Setup
<4. Control Application Creation> 4.1.2 Control Task Setup Control applications created in Logic Designer are created by assigning to tasks and turn into instances. This section describes task types and task settings. ● General Limitations of Control Tasks All control tasks are subject to the following limitations. •...
Page 40 <4. Control Application Creation> Execution triggers (status change or error) for a system tasks can be selected from a list of predefined triggers. System tasks are run only under specific FCN-500 or FCN-RTU conditions. Hence, this task type is, in general, not used in control applications except for some special-purpose applications.
Page 41 <4. Control Application Creation> ● Control Task Settings The Task Settings dialog is used for specifying the execution interval, execution priority, watchdog time and other settings of a control task. For details on the relationship between the execution interval, priority and watchdog time of a control task, and how these settings affect task execution, see Section 4.3.3, “Task Schedule”...
Page 42: Multi-Tasking
<4. Control Application Creation> 4.1.3 Multi-tasking This section describes the considerations and precautions for running multiple tasks concurrently on an FCN-500 or FCN-RTU. SEE ALSO For details on the behavior of the FCN-500 or FCN-RTU when multiple tasks are created, see Section 4.3.3, “Task Schedule”...
Page 43: Specifying Target Fcn/Fcj
<4. Control Application Creation> 4.1.4 Specifying Target FCN/FCJ The following Target dialog is used for specifying the IP address of the FCN-500 or FCN-RTU. Besides the IP address, this dialog also displays a checkbox with the message “The task aborts when the execution time of a task exceeds a watch dog time.” The checkbox setting is explained below.
Page 44 <4. Control Application Creation> The above description shows that if the “The task aborts when the execution time...” checkbox is ticked, control computation of the FCN-500 or FCN-RTU will stop even if only one watchdog error is generated. To prevent this, untick the “The task aborts when the execution time...” checkbox. ●...
Page 45: Multi-Resource Project
<4. Control Application Creation> 4.1.5 Multi-resource Project In Logic Designer applications, FCN-500s or FCN-RTUs are called resources and one FCN-500 or FCN-RTU controller maps to one resource. In the example shown in the figure below, a system comprises three FCN-500s so three resources are created.
Page 46: Application Size
<4. Control Application Creation> 4.1.6 Application Size The upper limit for the size of an application is described in Section 2.2.2, “Checking FCN-500, FCN-RTU Control Application Size." In addition to application size, the system imposes limits on the number of resources, the number of logical POUs, etc.
Page 47 <4. Control Application Creation> 7. Maximum value of code size in the logical POUs: 200KB This is the upper limit on the size of one logical POU. If the size of a logical POU exceeds 200 KB, a compiler error is generated. If the size exceeds 80% of 200 KB, a compiler warning is displayed.
Page 48: Application Programming Languages
<4. Control Application Creation> Application Programming Languages Logic Designer supports 5 types of programming languages for creating control applications. This section describes the characteristics of each of these languages, and the types of applications for which they are best suited. 4.2.1 Programming Languages Supported by Logic Designer Logic Designer supports 5 types of programming languages conforming to the IEC 61131-3 standard for creating applications.
Page 49: Selecting A Programming Language
<4. Control Application Creation> These five languages can be broadly classified into continuous execution languages and step execution languages. FBD, LD, IL and ST belong to the former group, whereby application content is executed continuously, while ST belong to the latter group, whereby application content is segmented into and executed as steps.
Page 50: Principles Of Application Creation
<4. Control Application Creation> Principles of Application Creation In previous sections, we discussed task settings and selection of programming language in Logic Designer. This section discusses some principles for good application creation. 4.3.1 Principles of Application Creation When creating a function in Logic Designer, consider different techniques but select an appropriate language and creating a simple application are the two principles that should be adhered to.
Page 51 <4. Control Application Creation> Consider the example logic to be created below, which consists of multiple analog inputs, NPAS_PIDs and analog outputs, as well as logic for setting MV to MAN, 0%, PV value calculation processing and logic for writing SV value for the NPAS_PID. This application can be segmented by function into four pieces: analog I/O and NPAS_PID;...
Page 52 <4. Control Application Creation> In this segmentation, while the worksheet is organized by individual functions of analog input, NPAS_PID and analog output, the connections between the NPAS_POUs are not implemented by direct links, but implemented through data passing by variables. As a result, the data flow and inter-block relationships are not visually captured, which destroys one of the features of FBD.
Page 53: Bottom-Up Application Creation
<4. Control Application Creation> 4.3.3 Bottom-up Application Creation In Section 4.3.2, “Example of a Simple Application," we have investigated code worksheet segmentation and logical POU segmentation. After deciding on the organization of the code worksheets and logical POUs, create the control application in a bottom-up manner starting from the smaller parts by investigating which parts, if any, should be combined or componentized.
Page 54: Application Creation Know-How
<4. Control Application Creation> Application Creation Know-how Control application is created using Logic Designer. For details on know-how relating to control application creation, see Chapter 9, “Advanced Engineering.” Section 9.1, “General Application Development Know-how ” of Chapter 9, “Advanced Engineering” Section 9.2, “Know-how in Use of NPAS_POU”...
Page 55: Network Templates
Use of network templates simplifies control logic construction. Basic control loop templates, published on the Members Only Page of the “Yokogawa Partner Portal STARDOM” website (https://partner.yokogawa.com/global/member/rtu/nettemp/index.htm), can be downloaded and copied into a prescribed folder for reuse. For more details, read the documentation accompanying the templates.
Page 56: Application Encapsulation
<4. Control Application Creation> Application Encapsulation User-defined POUs and function blocks can be registered in Logic Designer. This section describes the features of user-defined POUs, how to create these POUs and the relevant precautions. 4.6.1 Features of Application Encapsulation ● What is an Application Encapsulation? Application encapsulation in this document refers to user-created logic defined as a user defined POUs.
Page 57 <4. Control Application Creation> 2. Reduced debugging effort As described earlier, besides copying and pasting, creating logic by copying also requires modification of variables names. Such hand work must be checked using desk debugging, as well as actual operation. Encapsulated logic, on the other hand, runs exactly the same way wherever it is used in Logic Designer.
Page 58: Procedure For Creating A Pou
<4. Control Application Creation> 4.6.2 Procedure for Creating a POU This section describes the procedure for creating a POU using as example the logic for detecting a mode, status or alarm condition of an NPAS POU given in Section 9.2.2, “How to Detect Mode, Status and Alarm” of Chapter 9, “Advanced Engineering.”...
Page 59 <4. Control Application Creation> 1.2 On the displayed dialog, specify a POU name and language. Click [OK]. For this example, specify “SAMPLE” for the name and select “FBD” for the language. 1.3 A user function block named "SAMPLE" is created under [Logical POUs]. Next, create logic within this block.
Page 60 <4. Control Application Creation> For this example, specify "IN" for [Name]. This becomes the terminal name of the POU. As this terminal is to be used for reading external data into the POU, select "VAR_INPUT” for [Usage]. Select “DWORD” for [Data Type] (the same data type for an NPAS POU mode, status or alarm condition).
Page 61 <4. Control Application Creation> 3.2 In the figure below, the first row shows the basic logic of the POU while the second row shows two logics, which make use of the created POU for detecting HH and LL alarms of NPAS_PVI_1 respectively. (*Detects HH alarm of PVI_1*)”...
Page 62: Modifying Logic Of A Pou
<4. Control Application Creation> 4.6.3 Modifying Logic of a POU This section describes the procedure for modifying a created POU along with precautions. ● Precautions on POU Modification 1. Selective Modification of POU is not Allowed As described in the merits of componentization in Section 4.7.1, “Features of Application Encapsulation,”...
Page 63 <4. Control Application Creation> ● Procedure for Modifying a POU This section describes here the procedure for modifying a POU, using an example involving adding an input terminal to the “SAMPLE” POU created in Section 4.7.2, “Procedure for Creating a POU.” Change in requirement specification The OUT terminal is to be turned on if the mode, status or alarm condition becomes true and remains true for a certain duration, which can be specified...
Page 64 <4. Control Application Creation> 2. Modify the control logic Modify the logic within the user function. The figure below shows the logic after modification using jump and return functions described in Section 9.1.7, “Jump, Connector and Return Functions” of Chapter 9, “Advanced Engineering.” Firstly, if the mode, status or alarm condition becomes true, variable “V001”...
Page 65 <4. Control Application Creation> 3. Redefine the control logic The modification of the control logic is completed. However, adding terminal “TM” involves a graphical change, which is not reflected graphically in Logic Designer unless the POU is redefined in Logic Designer.
Page 66: Handling Compile Errors And Warnings
<4. Control Application Creation> Handling Compile Errors and Warnings When compiling a project in Logic Designer, compile errors and warnings may sometimes be displayed as a compile result. A compile error indicate the presence of a system error or a syntax error in the application program that prevents successful completion of compile.
Page 67 <4. Control Application Creation> Variable 'V008' is never used. Variable 'V009' is never used. Variable 'V011' is never used. Among these warnings, the warning “Instance 'R_TRIG_1' is used more than once.” indicates a real problem. From the warning, we know that function block “R_TRIG” for detecting a rising edge is used in multiple places with the same name “R_TRIG_1”.
Page 68: Precautions About Downloading
<4. Control Application Creation> Precautions About Downloading A control application can be downloaded to the FCN-500 or FCN-RTU after successful compile. This section describes some precautions about downloading. For details on this topic, read the online help documentation shown below. In this document, unless otherwise stated, download refers to downloading a project to the main memory.
Page 69 <4. Control Application Creation> IMPORTANT Error items to be checked during the execution of the control application are shown in the table below. If an error occurs, the task may stop and multiple error messages may be displayed. In this case, online downloads are no longer enabled. Once again, please download project offline.
Page 70: Downloading Boot Project And Source
<4. Control Application Creation> 4.8.2 Downloading Boot Project and Source This section describes downloading boot project and source . SEE ALSO For details on boot project and source, see Section 4.8.4, “Importance of Boot Project” and Section 4.8.5, “Importance of Source.” ●...
Page 71 Clicking the [Download File] button enclosed by blue box (4) allows any file to be downloaded to the flash memory for storage. SEE ALSO For details on how to download a project, see Section 4.6, “Hands-on: Downloading a Project” of TI “STARDOM FCN-500/FCN-RTU Primer – Fundamental.” TI 34P02K35-02E Jun. 6, 2018-00...
Page 72: Importance Of Boot Project
<4. Control Application Creation> 4.8.4 Importance of Boot Project It is extremely important to download the latest project to the boot project in real systems. As described in Section 4.8.2, “Downloading Boot Project and Source,” when the FCN-500 or FCN-RTU is powered on, it begins control using the boot project. If the boot project is out-dated, powering off and then on the FCN-500 or FCN-RTU will cause control to be started with an out-dated control application.
Page 73: Importance Of Source
<4. Control Application Creation> 4.8.5 Importance of Source As described in Section 4.9.2, “Downloading Boot Project and Source,” a source is actually a Logic Designer project compressed into zwt format and stored on the flash memory. Moreover, by a simple operation, a project can be restored on a PC by uploading the source.
Page 74: Control Application Backup
\FCN-FCJ\LogicDesigner\Projects If Logic Designer is installed in its default location, this folder corresponds to: C:\YOKOGAWA\FCN-FCJ\LogicDesigner\Projects Within this folder, application data is stored in a folder having the same name as the Logic Designer project and a file named “.mwt”. Depending on the size of an application, the folder named after the project may be several tens of megabytes, making direct backup a little difficult.
Page 75 <4. Control Application Creation> The Zip Options checkboxes should generally be left unticked unless page layout has been edited. Even if you are creating a user library, user library, please do not compress. It will also be compressed libraries such as NPAS POU and APPF POU at the same time. When you unzip the compression project in a different environment, it will be different versions of the POU are mixed.
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Page 77: Function Test (Debugging)
<5. Function Test> Function Test (Debugging) Function test is synonymous to debugging, and involves checking whether a created control application runs in compliance to a requirement specification and checking for application bugs. Function test may also help discover contradictions in the requirement specification. This chapter describes know-how and precautions relating to debugging of FCN-500 and FCN-RTU applications.
Page 78: Precautions Of Testing When Using In-House Equipment
<5. Function Test> 5.1.1 Precautions of Testing When Using In-house Equipment When using in-house test equipment for debugging, the test environment may be different from the target equipment. ● Style of CPU module When debugging a new system, the FCN-500 or FCN-RTU of the in-house test equipment used for debugging may be of an older version and its style number of the CPU may be different from that of the target equipment.
Page 79 <5. Function Test> ● Revision of CPU module Before starting debugging using in-house test equipment, check the revision of the FCN/FCJ Basic Software (OS) stored on the CPU module. When testing using in-house equipment, the FCN/FCJ OS stored on the CPU module may not be of the latest revision and thus should be checked.
Page 80 <5. Function Test> ● Suffix code on CPU module Consider whether the suffix code on CPU module of the in-house test equipment differ from the suffix code for target equipment. Compare the suffix code on CPU module of the in-house test equipment against the suffix code for target equipment, and check for any debugging problem.
Page 81: Precautions Of Testing When Using Fcn/Fcj Simulator
<5. Function Test> 5.1.2 Precautions of Testing When Using FCN/FCJ Simulator The FCN/FCJ Simulator tool is used to simulate the execution of a control application on a PC. Using a FCN/FCJ Simulator allows the function test of a control application to be carried out on a PC without an FCN-500 or FCN-RTU.
Page 82 <5. Function Test> • Communication function of POU performing communication processing Inter-FCN/FCJ communication, Modbus communication, serial communication, Ethernet communication, communication using communication POUs, etc. cannot be done. ● Items that can be debugged using FCN/FCJ Simulator As described earlier, the I/O function is not supported by the FCN/FCJ Simulator. Therefore, debugging using FCN/FCJ Simulator is in fact debugging with I/O in disconnected state.
Page 83: Precautions Of Testing When Using Target Equipment
<5. Function Test> 5.1.3 Precautions of Testing When Using Target Equipment Target equipment is delivered after completion of user acceptance test for use in the factory. Therefore, it is important to ensure that all settings are properly done and avoid failures due to oversight. ●...
Page 84 <5. Function Test> • 2-wire/4-wire setting of current input module The following current input modules must be configured for 2-wire or 4-wire system during installation. NFAI141 NFAI143 NFAI841 SEE ALSO For details on the 2-wire/4-wire setting, see Section 8.1.1, “Checking Operation Specification of Analog/Digital Input.”...
Page 85: Precautions Of Migrating Testing From In-House Equipment To Target Equipment
<5. Function Test> 5.1.4 Precautions of Migrating Testing from In-house Equipment to Target Equipment Debugging is sometimes started on in-house test equipment and then migrated to the target equipment halfway through function test. We describe two migration scenarios below. ● If CPU Module of In-house Equipment Are Used before Migration In this migration scenario, debugging started using the CPU module of in-house equipment is to be migrated to the target equipment upon delivery of its CPU module.
Page 86 \WorkSpace\Current \USERS\STARDOM\RETAIN If FCN/FCJ Simulator is installed in its default location, this folder corresponds C:\YOKOGAWA\FCN-FCJ\FCXSim\WorkSpace\Current \USERS\STARDOM\RETAIN 2. Download Logic Designer projects not used by FCN/FCJ Simulator to the target FCN-500 or FCN-RTU. 3. Execute FcxBackup command for the target FCN-500 or FCN-RTU. This backs up data on the CPU module of the target FCN-500 or FCN-RTU to a folder named “Backup”...
Page 87: Unit Test And Combination Test
<5. Function Test> Unit Test and Combination Test Function test can be divided by scope into unit test and combination test. • Unit test The control applications such as its control logic and control loops are tested. • Combination test Including FCN-500 or FCN-RTU application graphics, displays and third-party equipment/sub-systems, and communication functions.
Page 88: Unit Test Precautions
<5. Function Test> Unit Test Precautions Unit test focuses on confirming the operation of control applications running on the FCN-500 or FCN-RTU. This section describes know-how and precautions related to unit test. 5.3.1 Pre-unit Test Checklist Check the following items before starting unit test. •...
Page 89: Unit Test Methodology
<5. Function Test> 5.3.2 Unit Test Methodology Like creation of control application, unit test should be carried out in a bottom-up manner, starting from the smaller logic parts and combining them into larger parts. This section describes this method using the control application example described below.
Page 90 <5. Function Test> After debugging each control loops and conditional logics, combine and debug them together. In combined debug, start by debugging the two normal paths: from starting to ending heating and from stopping to restarting heating. After debugging the normal paths, debug the exception paths. Exception paths involve failure of equipment during heating.
Page 91: Unit Test Know-How
<5. Function Test> 5.3.3 Unit Test Know-how This section provides some useful know-how for testing a control application. ● Testing Control Loops When testing a control loop that makes use of NPAS POUs, besides checking loop connections such as processing of regulatory data and cascade connection, also check for correct assignment of engineering parameters.
Page 92 <5. Function Test> ● Testing User Function Blocks A function block created as a POU behaves the same way in every location where it is used. Therefore, when debugging a user function block, thorough testing is only required in any one location. Once debugged, it can be expected to operate correctly in every other location, and thus requires only simple verification of correct operation.
Page 93 <5. Function Test> ● Testing Communication Applications Connections between an FCN-500 or FCN-RTU, which uses communication application, and communication equipment can be tested in four steps as described below. 1. Check physical hardware connection with communication equipment and its setup Check the cable connecting the FCN-500 or FCN-RTU and communication equipment, as well as its wiring system.
Page 94: Combination Test Precautions
<5. Function Test> Combination Test Precautions Combination test goes beyond the control applications of FCN-500 or FCN-RTU. With the FCN-500 or FCN-RTU connected to graphics, higher-level computers and other equipment through various means of communication, combination test verifies whether the system as a whole operates correctly, whether it operates correctly even in the event of failures, and whether there are any inconsistencies in the requirement specification.
Page 95: Checking Log Files Of Fcn-500, Fcn-Rtu
<5. Function Test> 5.4.3 Checking Log Files of FCN-500, FCN-RTU System errors such as watchdog errors caused by a sudden increase in CPU load, inter-FCN/FCJ communication interruptions, as well as array boundary errors and division by zero errors caused by control applications, whenever detected, are recorded by the FCN-500 or FCN-RTU in system log files.
Page 96 <5. Function Test> If retain data is resident in non-volatile memory, the value specified in step 3 should be restored. If retain data is resident in volatile memory, the value saved to the flash memory in step 2 should be restored. ●...
Page 97 <5. Function Test> ● Recovery from System–wide Power Off Power off and then power on, not just the FCN-500 or FCN-RTU but the entire system. Check the operation after power is restored. ● Operation and Recovery after Failure of One of Two Duplex CPUs (FCN- 500 only) To simulate failure of one of two duplexed CPUs, press the RESET button of the corresponding CPU.
Page 98 <5. Function Test> ● Operation and Recovery after Failure of One of Two Duplex Power Supply Modules To simulate failure of one of two duplex power supply modules, unmount one power supply module from the base module or interrupt the power supply to one power supply module.
Page 99 <5. Function Test> ● Fall-back Operation of Analog/Digital Output Modules As described in Section 8.1.2, “Checking Operation Specification of Analog/Digital Output” of Chapter 8, “Detailed Description,” an analog/digital output module performs fallback if it detects a loss of line access with the CPU module beyond 4 seconds.
Page 100: Checking Cpu Load And Application Size
<5. Function Test> Checking CPU Load and Application Size Section 2.2.2, “Checking FCN-500, FCN-RTU Control Application Size" and Section “2.2.3, “Checking FCN-500, FCN-RTU Performance" describe checking of FCN-500 or FCN-RTU control application size and performance before application creation. These checks performed before application creation give desk-calculated values, which must be verified by actual size and performance during function test.
Page 101: Checking Application Size
<5. Function Test> Precautions when checking CPU load The displayed CPU load includes not only CPU load due to control application execution but also CPU load due to I/O module access. Thus, correct CPU load check must be done with all I/O modules installed on target equipment, and I/O disconnection disabled.
Page 102 Projects\\C \Configuration\R\ If Logic Designer is installed in its default location, this folder corresponds to: C:\YOKOGAWA\FCN-FCJ\LogicDesigner\Projects \\C\Configuration\R\ Click the right mouse button on the “ADLST.edf” file and select [Properties] from the pop-up menu.
Page 103: Logic Designer's Debug Mode
<5. Function Test> Logic Designer’s Debug Mode Before checking the operation of a control application using Logic Designer, switch Logic Designer to Debug mode. This section describes the know-how and precautions when debugging a control application using Logic Designer. SEE ALSO For details on how to perform debugging in Logic Designer, see Section 4.8, "Hands on: Checking Operation”...
Page 104: Switching To Debug Mode
<5. Function Test> 5.6.1 Switching to Debug Mode Switch Logic Designer to Debug mode before debugging. SEE ALSO For details on how to switch Logic Designer into Debug mode, see ”Switching Logic Designer to Debug Mode” of TI “STARDOM FCN/FCJ Primer – Fundamental.” If no warning dialog is displayed when switching to Debug mode, as is the case described in the above-mentioned TI document, you can begin debugging after the switchover is completed.
Page 105 <5. Function Test> 2. If project in Logic Designer has not been recompiled If a control application in Logic Designer is modified, and then try to switch to Debug mode without recompiling the application, the following warning dialog is displayed. Explanation of warning This warning message indicates that a control application modified using Logic Designer has not been recompiled.
Page 106 <5. Function Test> ● Checking Project Content by Switching to Debug Mode As described in item 3 above, switching to Debug mode displays a warning message if the control application on the FCN-500 or FCN-RTU and the control application in Logic Designer are not identical. This function can be used to check whether control applications on the FCN-500 or FCN-RTU and in the Logic Designer are identical.
Page 107: Basic Operation In Debug Mode
<5. Function Test> 5.6.2 Basic Operation in Debug Mode Switching Logic Designer to Debug mode enables modification of variable values and device label variable values, use of the Watch window, and thus debugging. SEE ALSO For details on the use of Debug mode and the Watch window, see Section 4.8, "Hands on: Checking Operation”...
Page 108 <5. Function Test> ● Procedure for Disconnecting I/O Among the list of [SYSTEM] Interface Flags is a global variable named “GS_NFIO_DISCONNF”. To disconnect I/O, switch Logic Designer to Debug mode and change the online value of global variable GS_NFIO_DISCONNF to TRUE. The initial value of GS_NFIO_DISCONNF is FALSE.
Page 109: Entering And Checking Values Of Device Label Variables
<5. Function Test> 5.6.4 Entering and Checking Values of Device Label Variables After switching Logic Designer to Debug mode and disconnecting I/O, modify the Status of device label variables to clear IOP and OOP alarms. Then, enter values for device label variables. This section describes the procedure below using the following example device label variables.
Page 110 <5. Function Test> Some of the Status values (enclosed by blue boxes) are displayed as “16#8060”, indicating BAD, IOCN and CERR data statuses. In this condition, IOP alarm is generated for analog/digital input and OOP alarm is generated for analog or digital output so NPAS_POU cannot run normally. To remove this condition, modify these Status values from “16#8060”...
Page 111 <5. Function Test> ● Checking Value of Device Label Variable of Analog Output Values of device label variables of analog outputs are normally MV values of NPAS_ID or NPAS_MLD, etc. or values set by an application, and therefore are not normally entered directly during debugging with I/O in disconnected state.
Page 112 <5. Function Test> • For analog output For analog output, the conversions are similar to those of analog input but are performed in the reverse direction. Example: Outputs MV value of NPAS_PID 4-20mA or 1-5V electrical signal NPAS_AO_ANLG (standard analog output POU) is used for output processing (2) Conversion by NPA_AO_ANLG (4) Output electrical signal...
Page 113 <5. Function Test> ● Entering value to device label variable of digital input For each digital input, a device label variable, as well as a variable with a "_BOOL" suffix is generated. To enter a value to a device label variable, either write 0 or 1 to the WORD type Value of its device label variable or write FALSE or TRUE to the variable with "_BOOL"...
Page 114: Software Wiring
<5. Function Test> Software Wiring The software wiring function allows analog input and digital input values to be varied from an application. Software wiring is used for debugging without connecting to I/O equipment and external inputs. This section gives an overview of software wiring, together with precautions on its use.
Page 115: Software Wiring Creation And Precautions
<5. Function Test> 5.7.2 Software Wiring Creation and Precautions This section describes how to create software wiring and the related precautions. ● Using the Wizard Software wiring can be created using Logic Designer's Software Wiring Definition dialog but using the Software Wiring wizard shown in the figure below is simpler. As a general rule, use the Software Wiring wizard to create software wiring.
Page 116 <5. Function Test> 2. Gain and Bias Specify the gain and bias as values to be added to analog output values to give analog input values. Specify gain and bias values as required. This setting is enabled only for closed loop wiring. 3.
Page 117: Precautions When Creating Software Wiring
<5. Function Test> 5.7.3 Precautions When Creating Software Wiring Software wiring varies input values in an application but its operation is somewhat different from real analog and digital inputs. For instance, in the case of real analog outputs in a plant, it takes time for PV values to vary after the MV value of, say, a control valve, has been manually changed, and input values do not vary in a definite manner with variance in analog output values.
Page 118: Using Loop Check Tool
<5. Function Test> Using Loop Check Tool The Loop Check Tool, which can be started from Resource Configurator, can be used to display analog/digital input/output values of I/O modules. During testing with I/O equipment connected to an I/O module, if values cannot be read from or written to the I/O equipment, the Loop Check Tool can be used to help pinpoint whether the cause lies on the application side or the hardware side.
Page 119: Values Displayed In Loop Check Tool
<5. Function Test> 5.8.1 Values Displayed in Loop Check Tool Analog/digital data held by various equipment are input as electrical signals to an I/O module. An I/O module performs A/D conversion to convert the analog (electrical) signals to numerical values. Similarly, an I/O module performs D/A conversion to convert numerical values set by the CPU module to analog (electrical) signals before output to various equipment.
Page 120: Locating Problems Using Loop Check Tool
<5. Function Test> 5.8.2 Locating Problems Using Loop Check Tool When a problem is encountered during testing with input/output equipment connected to an I/O module, the first thing to do is to check the values of the I/O modules. ● If Values are Displayed in Loop Check Tool If values are displayed in Loop Check Tool but the actual input/output values are different from the values of a device label variable, there are three possible cases.
Page 121 <5. Function Test> ● If No Values Are Displayed in Loop Check Tool If grey asterisks ('*') characters are displayed for Loop Check Tool values, check the following items. • 24V analog field power supply As described in Section 2.1.1, some FCN-500 or FCN-RTU I/O modules require analog field power supply.
Page 122: User Acceptance Test (Uat)
<6. User Acceptance Test> User Acceptance Test (UAT) Before starting user acceptance test (UAT), verify that all function tests have been completed and all specification changes have been addressed. Equipment to be used in UAT may not always be identical to the actual system.
Page 123: Uat Implementation Guidelines
<6. User Acceptance Test> 6.1.2 UAT Implementation Guidelines Verify that the following guidelines are observed in UAT implementation using the following checklist. • Ample time must be allowed for function test. Compare the UAT schedule against the size of created control applications, and verify that ample time is reserved for function tests.
Page 124: Items Requiring Prior Explanation To Users
<6. User Acceptance Test> Items Requiring Prior Explanation to Users If there are differences between the equipment to be used for UAT and the actual system, it is necessary to obtain prior consent of the user by explaining what the differences are, how the differences are to be tested, and what possible problems may arise.
Page 125: Differences Between Process I/O And Software Wiring
<6. User Acceptance Test> 6.2.2 Differences between Process I/O and Software Wiring If I/O equipment or simulator input devices can be connected to all analog and digital inputs and outputs during UAT, everything will be fine but this is often not the case.
Page 126: System Delivery Precautions
<7. System Delivery Precautions> System Delivery Precautions System delivery is the very last process in STARDOM engineering. An unsuccessful system delivery may put to waste all work up to this point or necessitate rebuilding of the system. Thus it can be said that system delivery is the most important process in STARDOM engineering.
Page 127: System Delivery Checklist
<7. System Delivery Precautions> System Delivery Checklist Before starting system delivery, check the items described below. 7.1.1 System Delivery Prerequisites Before starting system delivery, verify that all specification changes and problems identified during use acceptance test have been addressed. For any item that cannot be addressed in time for system delivery, confirm with the user when and by whom it will be rectified, as well as how it will be tested.
Page 128 <7. System Delivery Precautions> ● Forms of Delivery for System Expansion The forms of delivery for a system expansion job involving adding a new FCN-500 or FCN-RTU to an existing system is the same for delivery of a new system. ●...
Page 129: Delivery For New System
<7. System Delivery Precautions> Delivery for New System This section describes know-how and precautions relating to delivery of a new system. 7.2.1 Pre-Delivery Preparation Perform the following steps to prepare for system delivery. ● Download Boot Project and Source Download the latest project in Logic Designer to the boot project and source. At this point, verify that the initial value of global variable GS_NFIO_DISCONNF, which enables I/O disconnection, is set to FALSE.
Page 130: Control Application Backup
<7. System Delivery Precautions> 7.2.2 Control Application Backup Back up a complete set of the control application for archival purpose. There are two method of backup . The first method, the contents are backing up to the PC by the command. The second method, the contents are backing up to SD card by the backup function (FCN-500 only).
Page 131: System Delivery
<7. System Delivery Precautions> 7.2.3 System Delivery 1. If delivering equipment used in user acceptance test as is No special delivery engineering is required except for pre-delivery preparation and control application backup. 2. If delivering FCN-500, FCN-RTU CPU module and PC Same as case 1, for this case where the FCN-500 or FCN-RTU was delivered early and only the CPU module and PC are to be delivered after UAT, no special delivery engineering is required except for pre-delivery preparation and control application...
Page 132: Delivery For System Expansion
<7. System Delivery Precautions> Delivery for System Expansion For a system expansion job involving adding a new FCN-500 or FCN-RTU to an existing system, pre-delivery preparation is the same as described earlier for a new system. Moreover, delivery engineering for a system expansion job is the same as that for delivering only the CPU module of the FCN-500 or FCN-RTU for a new system.
Page 133: Delivery For System Modification
<7. System Delivery Precautions> Delivery for System Modification For a system modification job, it is important to download the modified application to the operational site system without adversely affecting its operation. Besides the general precautions described below, some systems may require additional precautions to be observed.
Page 134: On-Site Installation
<7. System Delivery Precautions> 7.4.4 On-site Installation A general procedure for on-site installation is described below. Some systems may require other additional work to be performed. Review the state of the existing system, and add additional work items as required. 1.
Page 135: Procedure Instruction Sheet And Rehearsal
<7. System Delivery Precautions> Procedure Instruction Sheet and Rehearsal Whether delieverying a new system, a system expansion job or a system modification job, always create a procedure instruction sheet for any site work required and conduct a rehearsal beforehand. ● Site Procedure Instruction Sheet A site procedure instruction sheet should be created assuming that the site work is to be carried out by someone other than the engineer who is in charge of the job.
Page 136: Detailed Description
<8. Detailed Description> Detailed Description Checking Operation Specifications of I/O Modules 8.1.1 Checking Operation Specification of Analog/Digital Input Compare the operation specification of each module against the requirement specification to ensure that there is no problem. SEE ALSO For details on the operation specification of I/O modules, see Section A1.6, “I/O Modules” of IM “STARDOM FCN/FCJ Guide.”...
Page 137 <8. Detailed Description> ● Channel-based Settings The following settings apply to individual channels. 2-wire/4-wire system setting of current input module Configure the following current input modules for 4-wire system or 2-wire system according to the type of transmitter to be connected: NFAI141 NFAI143 NFAI841...
Page 138: Checking Operation Specification Of Analog/Digital Output
<8. Detailed Description> 8.1.2 Checking Operation Specification of Analog/Digital Output Compare the operation specification of each module with the requirement specification to ensure that there is no problem. SEE ALSO For details of operation specification of analog/digital output, see: Section A1.6, “I/O Modules” of IM “STARDOM FCN/FCJ Guide” Check the requirement specification regarding output fallback upon CPU failure and reverse output, and perform setup accordingly using Resource Configurator.
Page 139 <8. Detailed Description> Power supply failure of extension unit 2 (using SB bus) In a system that uses extension unit 3, even if the power supply module of extension unit 2 fails, I/O on extension unit 3 will not detect a failure. I/O in disconnected state CPU control in STOP state •...
Page 140: Checking Specification Of Pulse Input
<8. Detailed Description> 8.1.3 Checking Specification of Pulse Input Pulse input can be implemented using a pulse input module (NFAP135) or using a digital input module (NFDV151, NFDV161). ● Checking Specification of NFAP135 (Pulse Input Module) Using NFAP135 enables input of higher frequency pulses than using a digital input module.
Page 141: Checking Specification Of Pulse Width Output
<8. Detailed Description> • Minimum ON detection time and Maximum ON/OFF cycle NFDV151 and NFDV161 have minimum ON detection time of 20 ms and maximum ON/OFF cycle of 25 Hz. This means that the modules can be used for input of pulses whose ON time for one pulse is at least 20 ms and whose frequency is up to 25 Hz.
Page 142 <8. Detailed Description> ● Checking Specification of Digital Output Module (NFDV551, NFDV557, NFDV561) Digital output modules can also be used for pulse width output but the minimum output pulse width and increment is the same as the scan cycle. • Minimum output pulse width The minimum ON/OFF interval for digital output is the same as the scan cycle.
Page 143: Checking Specification Of Serial Communication
<8. Detailed Description> Checking Specification of Serial Communication Serial communication for FCN-500 or FCN-RTU can be implemented by using the serial port of the CPU module or by installing a serial communication module (NFLR111, NFLR121) in the FCN-500. ● When Using Serial Port Some items to be checked and precautions when using the serial port of an CPU module for serial communication are described below.
Page 144 <8. Detailed Description> ● When Using Serial Communication Module Some items to be checked and precautions when using serial communication module for serial communication are described below. The following settings can be specified for each port of the serial communication module using Resource Configurator.
Page 145: Precautions About Multi-Tasking
<8. Detailed Description> Precautions about Multi-tasking The section describes some precautions when creating a control application with multiple tasks. 1. Device Label Definition When defining a device label, in addition to signal type and data range, specify a task for updating the data of the device label. For a multi-tasking control application, specify a task that uses the device label for updating its data.
Page 146 <8. Detailed Description> Scan cycle 1 Scan cycle 2 Scan cycle 3 Input Control/ Output Input Control/ Output Input Control/ Output Task A proces- calculation proces- proces- calculation proces- proces- calculation proces- sing processing sing sing processing sing sing processing sing Input Output...
Page 147 <8. Detailed Description> Scan cycle 1 Scan cycle 2 Scan cycle 3 Control/ Control/ Control/ Input Output Input Output Input Output Task A calculation calculation calculation proces- proces- proces- proces- proces- proces- sing processing sing sing processing sing sing processing sing Variable P Logic M...
Page 148 <8. Detailed Description> Scan cycle 1 Scan cycle 2 Scan cycle 3 Control/ Control/ Control/ Input Output Input Output Input Output Task A calculation calculation calculation proces- proces- proces- proces- proces- proces- sing sing sing sing sing sing processing processing processing Variable P Variable Q...
Page 149: Criteria For Selecting Programming Languages In Logic Designer
<8. Detailed Description> Criteria for Selecting Programming Languages in Logic Designer This section describes the criteria for selecting programming languages to be used in Logic Designer. 8.4.1 Selection Criteria for FBD, LD and ST Graphical languages FBD and LD, and text-based language ST differ greatly in their representation and coding of applications but can all be used to create a given application.
Page 150 <8. Detailed Description> 1. Example of Single-loop NPAS_PID This sample application comprises one analog input, one analog output and one single-loop PID controller. Analog input : AI001 Analog output : AO001 NPAS_PID : FIC001 Tag comment : TEST The earlier figure shows the sample application represented in FBD or LD, while the above figure shows the same application represented in ST.
Page 151 <8. Detailed Description> 2. Example of Single-loop NPAS_PID with CAS connection to NPAS_PG_L30_BP This sample application adds a program set POU (NPAS_PG_L30BP) to the earlier single-loop NPAS_PID sample by making a cascade connection to terminal CAS_IN of the NPAS_PID. Analog input : AI002 Analog output : AO002 NPAS_PID...
Page 152 <8. Detailed Description> 3. Calculation Example This sample application performs the following calculations: b1 = me / ( P/1000.0 ) b2 = WC b3 = P2 / (P2_60F/1000.0) V2 = (b1 * b2 * b3) V2 = V2 * 6.3 / 1000000.0 The left picture shows the FBD, LD application, while the right picture shows the ST application.
Page 153 <8. Detailed Description> 4. Conditional Example 1 This sample application combines a condition with a calculation. Using an IF statement, b=b+1 is executed when variable ‘a’ is OFF. In the top figure, the FBD application is shown on the left while the LD application on the right.
Page 154 <8. Detailed Description> 5. Conditional Example 2 This sample application combines a condition with a calculation. Using a FOR statement, b=b+1 is executed 10 times. In the top figure, the FBD application is shown on the left while the LD application on the right.
Page 155 <8. Detailed Description> ● Language Characteristics and Selection • Characteristics of FBD and LD In FBD and LD, data connections and inter-function-block connections are represented as signal lines, which enables easy visualization of data flow, as well as inter-block relationships. FBD and LD languages are thus ideal for programming regulatory control of analog signals.
Page 156 <8. Detailed Description> ● Selecting a Suitable Language The table below summarizes the characteristics of the FBD, LD and ST programming languages. Regulatory control Calculation Conditional of analog signals × ◎ △ × △ △ × ◎ ◎ ◎: Most suitable △: Suitable ×: Not suitable When selecting a programming language for an application, besides the engineer’s personal competency, consider and investigate the suitability of each language before making a decision.
Page 157: Selecting Between Fbd And Ld
<8. Detailed Description> 8.4.2 Selecting between FBD and LD In Logic Designer, one logical POU is generally created using one language. FBD and LD, however, are the exceptions and can be easily combined in the code. For instance, an application can be coded in LD on an FBD logical POU, or coded in FBD on an LD logical POU.
Page 158: Combining Fbd, Ld And St
<8. Detailed Description> 8.4.3 Combining FBD, LD and ST Logic Designer does not allow an application to be coded in ST, which is a text- based language, on an FBD or LD logical POU, which is graphical-based. Similarly, it does not allow an application to be coded in FBD or LD on an ST logical POU. However, some applications may be better implemented by combining the features of graphical languages and text-based languages.
Page 159 <8. Detailed Description> Regulatory control Calculations and of analog signals conditional decisions User function block difference = | PV1 - PV2 | Signal A If mode = “a” NPAS_PVI_1 If difference ≥ preset value, turn on signal A If mode = “b” Signal B If difference ≥...
Page 160: Selecting Between Sfc And Stepped Fbd Or Ld
<8. Detailed Description> 8.4.4 Selecting between SFC and Stepped FBD or LD ● Characteristics of SFC Programming Language The SFC is a step execution type of language, which processes one step after another, and is thus ideal for building process progress type applications and sequence control applications.
Page 161 <8. Detailed Description> ● Stepped FBD or LD Application Stepped applications that behave like SFC can be created using FBD or LD. The figure below shows three logical POUs, namely, STEP0, STEP1 and STEP3, created using FBD or LD. In normal FBD or LD applications, STEP0 to STEP3 will be executed in each scan cycle.
Page 162 <8. Detailed Description> ● Selecting between SFC and Stepped FBD or LD There are no definite criteria for selecting between SFC and stepped FBD or LD. The decision is generally by personal discretion based on an engineer’s knowledge, experience and competency. However, the execution of an SFC action block is selected from multiple qualifiers so it is important to understand the the differences about action qualifiers.
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Page 164: Advanced Engineering
<9. Advanced Engineering > Advanced Engineering General Application Development Know-how This section describes know-how about IEC application development using Logic Designer. 9.1.1 Variable Definitions Variables, function blocks and NPAS POUs used in Logic Designer have variable names for each and they must be registered on the variable worksheet. A variable name not registered in the variable worksheet generates an error at compilation.
Page 165: Local Variables Versus Global Variables
<9. Advanced Engineering > 9.1.2 Local Variables versus Global Variables When creating an application, local variables and global variables can be defined. This section describes the differences between local variables and global variables, some precautions when defining local variables and global variables, the relationship between device label variables and global variables and other topics.
Page 166 <9. Advanced Engineering > LogicA LogicC accessible Local accessible Worksheet A1 Worksheet Local variables Worksheet A2 variables Worksheet A3 accessible accessible Global variables accessible accessible LogicB Main accessible Local Local Worksheet Worksheet variables variables accessible In Logic Designer, local variables have type “VAR”, while global variables have type "VAR_EXTERNAL" or "VAR_GLOBAL."...
Page 167 <9. Advanced Engineering > ● Device Label Variable Device labels defined using DeviceLabelDefinition in Logic Designer are automatically converted into device label variables. These device label variables are global variables and so can be used within any logical POU. These created device label variables are sorted by I/O type into four variable groups on the global variable worksheet.
Page 168: Rb And _Bool Suffix Variables Of Device Label Variables
<9. Advanced Engineering > 9.1.3 _RB and _BOOL Suffix Variables of Device Label Variables When a device label variable is defined, other variables with “_RB” and “_BOOL” suffices may be automatically created. The figure below shows examples of “_RB” and “_BOOL” variables created for each device label variable.
Page 169 <9. Advanced Engineering > DI001: DTag_I_Sts DO001: DTag_O_Sts Conversion from WORD to Conversion from WORD to Attr : WORD Attr : WORD BOOL data type BOOL data type Value : WORD DI001_BOOL : BOOL Value : WORD DO001_BOOL : BOOL Status : WORD Status : WORD dummy1 : WORD...
Page 170: Execution Order Of Control Application
<9. Advanced Engineering > 9.1.4 Execution Order of Control Application For an FCN-500 or FCN-RTU, the execution order of control has major significance. This section describes the concept of execution order, as well as how to determine the execution order and related precautions. ●...
Page 171 <9. Advanced Engineering > ● Execution Order within a Logical POU Multiple code worksheets created within one logical POU are executed from top to bottom. In the figure below, three code worksheets, namely LogicA1, LogicA2 and LogicA3, are created within logical POU “LogicA”. In this execution, the order of execution is from top to bottom: LogicA1 →...
Page 172 <9. Advanced Engineering > ● Displaying Execution Order within a Code Worksheet For a project which has been successfully compiled or “make”, open the code worksheet for which execution order is to displayed and select [Layout]-[Execution Order] from the menu bar. The execution order of POUs within a code worksheet is displayed.
Page 173 <9. Advanced Engineering > ● Execution Order between Sets of Line-Connected POUs Within a code worksheet coded in FBD or LD, sets of POUs connected by lines (circuit units) are executed from top to bottom, and from left to right. In the following example, the two POUs at the same height on top are executed from left to right, followed by the POU at the bottom.
Page 174 <9. Advanced Engineering > ● Concept of Reference Position The reference position used for determining relative heights of POUs within a code worksheet differs between FBD and LD. • Reference position for FBD Within a code worksheet created using only FBD, the highest point of each function, function block and NPAS POU, as indicated in the figure below, is used as the reference position for deciding relative heights.
Page 175 <9. Advanced Engineering > Reference position Reference position In the figure below, the input to contact C006 in the left LD has been changed. As the input to contact C006 no longer connects to the left power rail, the line connecting contact C006 and coil C007 is no longer the reference position.
Page 176 <9. Advanced Engineering > In the figure below, the LD logic is connected to the EN terminal of the rightmost OR logic so the reference position of FBD logic is changed to the lowest point. Moreover, the LD logic has the highest reference position among all logics so it is executed first.
Page 177: Inter-Fcn/Fcj Communication Concept
<9. Advanced Engineering > 9.1.5 Inter-FCN/FCJ Communication Concept The Inter-FCN-500, FCN-RTU Communication Function Block is used for exchanging data between FCN/FCJs. This section describes inter-FCN/FCJ communication – communication types, overview, selection criteria and related precautions. For details on inter-FCN/FCJ communication, see: “Inter-FCN/FCJ Communication Function/Function Block”...
Page 178 <9. Advanced Engineering > The CONNECT and SD_CFCX_CONNECT_EX function blocks for connection have identical functions except that the assignment of destination IP address and communication port is simple for SD_CFCX_CONNECT_EX so its use is recommended. ● Characteristics and Limitations of Confirmed Communication Characteristics In confirmed communication, READ and WRITE are used as function blocks for data receiving and sending.
Page 179 <9. Advanced Engineering > ● Characteristics and Limitations of Unconfirmed Communication Characteristics In unconfirmed communication, USEND and URECV are used as function blocks for data sending and receiving. These function blocks for sending and receiving must be created on both the source FCN-500 or FCN-RTU and destination FCN-500 or FCN-RTU as a pair.
Page 180 <9. Advanced Engineering > ● Limit on Number of Destination FCN/FCJs Up to 15 connections can be established for one FCN-500 or FCN-RTU. This means that one FCN-500 or FCN-RTU can communicate with up to 15 destination FCN- 500s or FCN-RTU s. Moreover, multiple connections can be established with the same destination FCN-500 or FCN-RTU but this would reduce the maximum number of destination FCN-500s or FCN-RTU s allowed for communication.
Page 181 <9. Advanced Engineering > ● Efficient Data Sending/Receiving Inter-FCN/FCJ communication processing is performed for each function block for sending/receiving. Thus, for send/receiving the same data size, reducing the number of function blocks for sending/receiving increases communication efficiency. Example: Sending 10 data using unconfirmed communication USEND_1V x 10 USEND_5V x 2 USEND_10V x 1...
Page 182 <9. Advanced Engineering > ● Example Applications of inter-FCN/FCJ Communication Two example applications using inter-FCN/FCJ communication are briefly described below. Data sharing by multiple tasks on duplex CPU configuration In an FCN-500 configured with duplex CPUs, if global variables are shared by multiple tasks, data identity on the control and standby CPUs cannot be guaranteed.
Page 183: How To Create User Data Types
<9. Advanced Engineering > 9.1.6 How to Create User Data Types Logic Designer allows an engineer to define customized data types, known as user data types. This section describes how to define user data types, and provides some examples on the use of user data types. ●...
Page 184 <9. Advanced Engineering > ● User Data Type Definitions Some sample user data type definitions are shown below. Lines 2 to 4 in the figure below Defines a data type named “AR_LREAL20”, which is an array of 20 LREAL-type data. Lines 7 to 9 in the figure below Defines a data type named “CData_REAL20”, which is an array of 20 CData_REAL-type data;...
Page 185 <9. Advanced Engineering > ● Examples on Use of User Data Types Described below are some examples where definition of a user data type simplifies programming of the application. Buffer for storing timestamp data and REAL-type data Example: To store REAL-type data of an FCN-500 or FCN-RTU together with timestamp Define a structured data type of STRING-type and REAL-type data to be used as data buffer.
Page 186: Jump, Connector And Return Functions
<9. Advanced Engineering > 9.1.7 Jump, Connector and Return Functions Logic Designer provides the Jump, Connector and Return functions. This section describes how these functions can be used. ● Overview of Jump, Connector and Return Functions Jump function The Jump function causes execution of an application to jump from one point (the source) to another specified point (the destination) on a code worksheet, skipping the execution of logic between the source and destination of the jump.
Page 187 <9. Advanced Engineering > When creating a jump in program LogicA, jumping into LogicA1, LogicA2 or LogicA3 is allowed but jumping from LogicA into another program such as LogicB or LogicC is not allowed. Similarly, when creating a connector in program LogicA, connecting into LogicA1, LogicA2 or LogicA3 is allowed but connecting from LogicA to another program is not allowed.
Page 188 <9. Advanced Engineering > ● Jump Example In the logic below, the output of AND is connected to jump “>>JUMP01” and a label “JUMP01” is coded below ADD. In this example, while the AND is true, execution jumps from jump "JUMP01" to label "JUMP01"...
Page 189 <9. Advanced Engineering > ● Return Example In the logic below, a “RETURN” is connected to the output of the topmost AND. In this example, when the topmost AND is true, processing of the program ends so both the ADD and the bottommost AND are not executed. ●...
Page 190: Cross References
<9. Advanced Engineering > 9.1.8 Cross References Cross references can be used to investigate on which variable worksheet variables, function blocks and NPAS_POUs used in Logic Designer are defined, and on which code worksheets they are used. ● How to Create Cross References To create cross references, select [Build]-[Build Cross References] from the menu bar, or press the [F12] key.
Page 191 <9. Advanced Engineering > ● Printing Cross References Generated cross references cannot be printed directly. To print cross references, first export the data to a CSV formatted file, and then print the CSV file. • How to export cross references Select [File]-[Export] from Logic Designer’s menu bar.
Page 192 <9. Advanced Engineering > 4. Generate cross references in this state. 5. Right-click on the Cross References window, and select [Filter]. On the display dialog, tick the “Unreferenced Variables” and “Global” checkboxes. Click [OK]. Only global variables with no reference, in other words, unused variables, are displayed.
Page 193: Specifying Retain Data And Opc Property
<9. Advanced Engineering > 9.1.9 Specifying Retain Data and OPC Property Variables used in Logic Designer are, by default, neither specified as retain data nor specified with OPC property. To configure a variable as retain data or to access a variable from other equipment using the OPC function requires the variable to be explicitly specified as retain data and specified with OPC property.
Page 194: Getting Fcn-500, Fcn-Rtu Time
<9. Advanced Engineering > 9.1.10 Getting FCN-500, FCN-RTU Time The following function blocks can be used in a control application to get the current time of an FCN-500 or FCN-RTU . PAS_GETTIME (get local time) PAS_GETTIME2 (get current time in milliseconds or convert current time to milliseconds) The time returned by these two function blocks is the time when they are executed.
Page 195: Precautions When Using Terminal En Of Functions
<9. Advanced Engineering > 9.1.11 Precautions When Using Terminal EN of Functions Functions used in Logic Designer have an EN terminal. This section describes some precautions regarding the use of the EN terminal. ● Function of EN terminal When no variable is connected to the EN terminal of a function, the function is executed in every scan cycle.
Page 196 <9. Advanced Engineering > ● Connecting Functions When Using EN Terminal To use the EN terminal to start or stop the execution of logic connecting multiple functions, you must connect the ENO terminal of the upstream function to the EN terminal of the downstream function.
Page 197 <9. Advanced Engineering > However, in the example shown in the figure above, when EN01 is FALSE, the ADD logic is not executed. On the other hand, the MUL logic performs calculation in every scan cycle using values stored in the memory area. To avoid this problem, if a variable is connected to the EN terminal of an upstream function block, connect the ENO terminal of the upstream function block to the EN terminal of the downstream function block.
Page 198: Logic For Saving Retain Data
<9. Advanced Engineering > 9.1.12 Logic for Saving Retain Data To save retain data on the on-board flash memory, change the system global variable "GS_RETAIN_SV_SW” to TRUE. This section describes some relevant programming precautions. ● Operation of GS_RETAIN_SV_SW When a program or user sets GS_RETAIN_SV_SW to TRUE, the FCN-500 or FCN- RTU begins saving retain data to the flash memory.
Page 199 <9. Advanced Engineering > PAS_GETTIME2 PAS_GETTIME2 TRUE EN_I EN_O FALSE B_GMT YEAR CNV_SECOND MONTH EQ_STRING R_TRIG_1 '%H%M%S' STR_FORMAT R_TRIG MOVE STRING_TIME HOUR '000000' TRUE GS_RETAIN_SV_SW MINUTE SECOND MILLISECOND TOTALSECOND WDAY YDAY STR_TIME STRING_TIME • Example of incorrect saving of retain data The application shown below gets the FCN/FCJ time using PAS_GETTIME2, and compares it against "000000"...
Page 200: Comparing Logic Designer Projects
<9. Advanced Engineering > 9.1.13 Comparing Logic Designer Projects Logic Designer R2.01.01 and later versions allow two projects on a PC to be compared easily. The comparison detects differences in code worksheets, variable worksheets and data worksheets, and is useful both during application development and maintenance.
Page 201: Avoidance Of The Error During Execution
<9. Advanced Engineering > 9.1.14 Avoidance of the Error during Execution The control task stops when division by zero (integer variables) or access exceeding the range of the array occurs. It is recommended to insert a code to avoid a careless stop. ●...
Page 202: Know-How In Use Of Npas_Pou
<9. Advanced Engineering > Know-how in Use of NPAS_POU This section describes know-how, settings and precautions relating to the use of NPAS_POU. 9.2.1 Scan Cycle and Control Cycle Scan cycle is described in Section 2.2.4, “Determining FCN-500, FCN-RTU Scan Cycle” and Section 4.1.2, “Control Task Setup.” When using an NPAS POU, besides scan cycle, the control cycle must also be considered.
Page 203 <9. Advanced Engineering > • Output processing Output processing of NPAS_POU processes the result of control calculation before its output as output signal. Output processing includes output limiter, output velocity limiter, output clamp, output tracking, CPV pushback, etc. • Alarm processing Alarm processing detects process failures by monitoring process values (PV) and manipulated output values (MV), and upon detection of a failure, informs the operation and monitoring functions by sending an alarm message.
Page 204 <9. Advanced Engineering > ● System-determined Control Cycle The system determines the control cycle of an NPAS POU by auto-setting, general setting or individual setting. • Auto-setting The control cycle is determined by the "I: totalization time" access parameter according to the following mapping: Totalization Time (s) Control Cycle (s) to 30...
Page 205: How To Detect Mode, Status And Alarm
<9. Advanced Engineering > 9.2.2 How to Detect Mode, Status and Alarm Each NPAS POU has mode, status and alarm status information. In addition, each device label variable has status information. This section describes how to read this status information in Logic Designer or from a control application.
Page 206 <9. Advanced Engineering > As an example, the bitmap of the alarm data of NPAS_POU is described below. Bit No. Status Not used Not used Not used Not used Not used Not used Not used Not used Bit No. Status IOP+ IOP- Not used Not used...
Page 207 <9. Advanced Engineering > In the figure below, the value of device label variable AI001 of the NPAS_PVI loop and the value of the variable for reading and writing access parameters, NPAS_PVI_1_PRM, are displayed in the Watch window. In the Watch window, Status of AI001, Alarm of NPAS_PVI_1 and Status of PV value of NPAS_PVI_1, which are enclosed within red boxes, are displayed with the following values: Status of AI001...
Page 208 <9. Advanced Engineering > From all these values, we know that device label AI001 is in error (BAD) condition due to severed wire or hardware failure, and as a result, an IOP+ (High Input Open) alarm is generated in NPAS_PVI_1, and the status of the PV value becomes BAD. ●...
Page 209 <9. Advanced Engineering > This logic performs an AND calculation of the alarm of NPAS_PVI and GM_ALRM_HH. In this way, even if multiple bits, including the HH limit bit, of the alarm of NPAS_PVI are set to 1, only the HH limit bit is extracted for comparison with GM_ALRM_HH.
Page 210: Npas_Pou Status Propagation
<9. Advanced Engineering > 9.2.3 NPAS_POU Status Propagation When creating a loop by joining NPAS POUs, it is important both to pass status information from upstream POUs to downstream POUs, as well as read back status information from downstream POUs to upstream POUs. This section describes the basics of status propagation, followed by application programming precautions.
Page 211 <9. Advanced Engineering > ● Upstream to Downstream Status Propagation In the figure below, input information of AI001 and AI002 are converted to CData_ REAL data type by input processing POU NPAS_AI_ANLG, and passed to NPAS_PID. At this time, status information of the device label variables are converted from WORD data type to DWORD data type, and passed as Status in a CData_REAL type structure to NPAS_PID.
Page 212 <9. Advanced Engineering > As described in the online help, when a terminal is connected to another terminal via a link in FBD or LD, data can only be passed through the link in one direction. Bi- directional data communication though a link is not allowed. Read back of status information from downstream to upstream can, however, be implemented by connecting the same variable to the RB_IN terminal of an upstream NPAS POU and the RB_OUT terminal of a downstream NPAS POU.
Page 213 <9. Advanced Engineering > ● Example of Correct Status Propagation In the example given in Section 9.2.3, "NPAS_POU Status Propagation," two NPAS_PIDs are connected in cascade. If the application is correctly programmed, the control modes and operations of the two NPAS_PIDs will be interlocked as shown below. Mode Operation NPAS_PID_1...
Page 214 <9. Advanced Engineering > NPAS_PID_2 accepts the SINT (Settled INiTialize) from NPAS_PID_1, and performs PID calculation using the MV value of NPAS_PID_1 as its SV value. This example involves two NPAS_PIDs in cascade connection but the importance of status information propagation and read back input apply similarly in other forms of NPAS POU connection.
Page 215: Blocked Npas_Pou Status Propagation
<9. Advanced Engineering > 9.2.4 Blocked NPAS_POU Status Propagation If incorrect application programming results in incorrect upstream to downstream propagation of status or incorrect downstream to upstream read back of status, it may affect control. ● Blocked Status Propagation or Read Back If a control application is incorrectly programmed so that upstream to downstream propagation of status information or downstream to upstream read back of status information is blocked, upstream and downstream exchange of status information...
Page 216 <9. Advanced Engineering > In this application, only bit 15 (BAD bit) of Status of the output from the OUT terminal of NPAS_PID_1 is extracted by NPAS_CDT_DESTR_1, which is then used by NPAS_CDR_STR_2 to reconstruct the CData_REAL type data. The other bit information such as MINT, SINT and CND are not propagated and hence lost.
Page 217 <9. Advanced Engineering > 3. When distributing cascade signal When distributing the output from one controller to multiple blocks, read back will be incorrect if the distribution is implemented using link branching. In the figure below, the output of NPAS_PID_1 is distributed to NPAS_PID_1 and NPAS_PID_2 using link branching.
Page 218: Selection Of Timers And Counters
<9. Advanced Engineering > 9.2.5 Selection of Timers and Counters When creating logic related to elapsed time for FCN-500 or FCN-RTU, either a timer function block or the NPAS_TM POU can be used. When creating logic related to counting, either a counter function block or the NPAS_CT POU can be used.
Page 219: Engineering Parameters
<9. Advanced Engineering > 9.2.6 Engineering Parameters Engineering parameters of an NPAS POU are used to configure its operation, and these parameter values can be assigned individually for each NPAS POU using Logic Designer. For convenience, engineering parameters of an NPAS POU are preset with default values, which defines the default operation of an NPAS POU, unless the values are otherwise modified during engineering.
Page 220 <9. Advanced Engineering > • _MVTRK_ACT_SW (Output tracking SW) Default: OFF • _AUT_FLBK_SW (AUT fallback switch) Default: OFF To enable I/O compensation, gap, deadband, output tracking or AUT fallback function, modify the respective switch to ON. • _ANS_IN_SW (Answerback input action direction switch) Default: Forward •...
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Page 222: Appendix 1 Stardom Engineering Flow Chart
Appendix 1 STARDOM Engineering Flow Chart Start ・Tag List with Descriptions. ・Data Types of I/O Variables. ・Scale High & Low Ranges. ・Engineering Units ・Logic Narratives & Interlocks. Design Inputs ・Override Conditions ・Redundancy Conditions ・Subsystem Details. Communication Interface Pre-Development Arrangements Communication Protocol...
Page 223 Logic Designer Development Initiate New Project-Adding Libraries ・Initiate a new Logic Designer Project by selecting either of below templates (this will add all necessary libraries) STARDOM FCN-500 - In case of FCN-RTU (NFLF111/NFLP121/NFLC121 not used) STARDOM FCX - In case of FCN-RTU (NFLF111/NFLP121/NFLC121 not...
Page 224 Logic Development-Application Creation ・Building Function Block Diagram Add POUs for logic building, such as AI, AO, DI, DO, Serial, Create Variables in Variable Sheets and check for Retain, PDD, OPC and Initial value setup etc., Add required Function Blocks/Functions to the POU and give unique names.
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Page 226: Revision Information
If you have any questions, you can send an E-mail to the following address. E-mail:[email protected] ■ Written by Yokogawa Electric Corporation ■ Published by Yokogawa Electric Corporation 2-9-32 Nakacho, Musashino-shi, Tokyo 180-8750, JAPAN This manual is subject to change without prior notice. TI 34P02K35-02E...

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Stardom fcn-rtu

YOKOGAWA STARDOM FCN-500 Engineering Manual

Introduction

Copyrights and Trademarks

1 Overview

2 Basic Design and Function Design

3 Hardware Setup

4 Control Application Creation

5 Function Test (Debugging)

6 User Acceptance Test (UAT)

7 System Delivery Precautions

8 Detailed Description

9 Advanced Engineering

Appendix 1 STARDOM Engineering Flow Chart

Revision Information

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