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- Page 1 ADC12DJ3200 Evaluation Module User's Guide Literature Number: SLAU701 May 2017...
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Page 2: Table Of Contents
HSDC Pro Settings for Optional ADC Device Configuration ..............Changing the Number of Frames per Multi-Frame (K) ..............Customizing the EVM for Optional Clocking Support ........................Signal Routing Contents SLAU701 – May 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... - Page 3 List of Tables ..........4-1. Supported and Non-Supported Features of the JESD204B Device ......................4-2. Low-Level Controls ......................5-1. Troubleshooting ..................C-1. ADC12DJ3200EVM Signal Routing SLAU701 – May 2017 List of Figures Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated...
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Page 4: Introduction
3.2 Giga-samples per second (GSPS) in dual channel mode or 6.4 GSPS in single channel mode. The ADC12DJ3200 device output data is transmitted over a standard JESD204B high-speed serial interface. This evaluation board also includes the following important features: •... -
Page 5: Evm Orientation
ADC device. Serial data rates of 12.8 Gbps down to 1 Gbps are supported. In the following sections of this document, theADC12DJ3200EVM evaluation board is referred to as the EVM and the ADC12DJ3200 device is referred to as the ADC device. SLAU701 – May 2017 Introduction Submit Documentation Feedback Copyright ©... -
Page 6: Equipment
This section describes how to setup the EVM on the bench with the proper equipment to evaluate the full performance of the ADC device. Evaluation Board Feature Identification Summary Figure 2-1. EVM Feature Locations Equipment SLAU701 – May 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 7: Required Equipment
NOTE: The clock source used to drive the LMK04828 (labeled LMKCLK) must be equal in frequency to the ADC sampling clock (labeled DEVCLK). The clock generators must be frequency- locked using a common 10-MHz reference. SLAU701 – May 2017 Equipment Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 8: Setup Procedure
Setup Procedure Figure 3-1. EVM Test Setup NOTE: The HSDC Pro software must be installed before connecting the TSW14J57EVM to the PC for the first time. Setup Procedure SLAU701 – May 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 9: Install The High Speed Data Converter (Hsdc) Pro Software
(b) Connect a signal generator to the LMKCLK input of the EVM through a bandpass filter. Configure the signal generator for the desired clock frequency in the range of 0.8 to 3.2 GHz. Set the output power to approximately 6–9 dBm. SLAU701 – May 2017 Setup Procedure Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 10: Turn On The Tsw14J57Evm Power And Connect To The Pc
Open the ADC12DJ3200EVM GUI and Program the ADC and Clocks The Device Configuration GUI is installed separately from the HSDC Pro installation and is a stand-alone GUI. Setup Procedure SLAU701 – May 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 11: Configuration Gui Evm Tab
EVM features with user-friendly controls and a low-level tab for directly configuring the registers. The EVM has three configurable devices, namely the ADC12DJ3200, LMK04828, and LMX2582. The register map for each device is provided in the device data sheet (SLVSD97, SNAS605, and SNAS680, respectively). -
Page 12: 3.10 Calibrate The Adc Device On The Evm
Navigate to the JESD204B tab and click on JESD Block Enable to re-start the JESD204B block. • Navigate back to the Control tab and click the Cal Triggered/Running button once, then click it again. This restarts the Calibration engine. Setup Procedure SLAU701 – May 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 13: 3.11 Open The Hsdc Software And Load The Fpga Image To The Tsw14J57Evm
SLAU701 – May 2017 Setup Procedure Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 14: High Speed Data Converter Pro (Hsdc) Gui
The HSDC Pro GUI will calculate the ADC Output Data Rate based on these inputs. The Fundamental and Harmonic frequency locations will also be calculated and identified in the FFT display. Setup Procedure SLAU701 – May 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 15: Additional Device Parameters Dialog Box
Frequency Calculations Remember Parameters for this Session ADC Sample Rate Before Decimation ADC Input Frequency NCO Frequency Decimation Factor Figure 3-5. Additional Device Parameters Dialog Box SLAU701 – May 2017 Setup Procedure Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 16: Device Configuration
FTDI USB-to-SPI converter located on the EVM. A GUI is provided to write instructions on the bus and program the registers of the ADC device. For more information about the registers in the ADC device, see the ADC12DJ3200 device data sheet (SLVSD97). -
Page 17: Low-Level Control
Perform a generic read or write command to the device shown in the Block drop-down box using read or write register buttons the address and write data information Figure 4-1. Low-Level Register Control Tab SLAU701 – May 2017 Device Configuration Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 18: Troubleshooting The Adc12Dj3200Evm
• Check that the spectral analysis parameters are properly configured. performance • Verify that bandpass filters are used in the clock and input signal paths and that low-noise signal sources are used. Troubleshooting the ADC12DJ3200EVM SLAU701 – May 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 19: A References
Appendix A SLAU701 – May 2017 References This section provides references to technical documents and user's guides. Technical Reference Documents • ADC12DJ3200 device data sheet (SLVSD97) • TSW14J57EVM user’s guide (SLWU092) • TSW14J56EVM user’s guide (SLWU086) • User's guide for the High Speed Data Converter Pro Software, also available in the help menu of the software (SLWU087) •... -
Page 20: Bhsdc Pro Settings For Optional Adc Device Configuration
OSC out Reference Reference SYSREF LMK_CLK FPGA_JESD_SYSREF LMK04828 FPGA_JESD_CLK_A FPGA_JESD_CLK_B CpOut1 CLKIN0 Figure B-1. ADC12DJxx00EVM Clocking System Block Diagram HSDC Pro Settings for Optional ADC Device Configuration SLAU701 – May 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 21: External Lmkclk Configuration
(a) In the EVM tab, set the Clock Source to External. (b) Enter the Sampling Frequency (F ) in step 2(b). DEVCLK Figure B-2. External LMKCLK Configuration SLAU701 – May 2017 HSDC Pro Settings for Optional ADC Device Configuration Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 22: External Devclk Evm Configuration
For a full evaluation platform, see the LMK04828 tool folder LMX2582 tool folder. HSDC Pro Settings for Optional ADC Device Configuration SLAU701 – May 2017 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... -
Page 23: C Signal Routing
DP9_M2C Z12,Z13 DP11_M2C_INV Z16,Z17 DP13_M2C_INV Y18,Y19 DP14_M2C_INV Y22,Y23 DP15_M2C_INV Red items with _INV in the signal name are inverted with respect to standard FMC polarity. SLAU701 – May 2017 Signal Routing Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated... - Page 24 STANDARD TERMS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms set forth herein.
- Page 25 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
- Page 26 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿６丁目２４番１号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/ /www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 3.4 European Union 3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive): This is a class A product intended for use in environments other than domestic environments that are connected to a low-voltage power-supply network that supplies buildings used for domestic purposes.
- Page 27 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2017, Texas Instruments Incorporated...
- Page 28 IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products;...
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