Ratio Measurements; Ac Converter Stage Gains; Ac Converter, Output Signal Path - HP 3456A Operating And Service Manual

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QI6A and QI7A in the Squaring Amplifier. Diode
CRI5 balances out the voltage drop across the base..
emitter junction of QI6B.
8-169. A 10 V dc full-scale output from the AC Con­
verter appears at TP4 for full-scale inputs on the I , 10
and l OO V ranges (e.g. for a lOO V rms full-scale input
with the 100 V range selected, the output will be 10 V).
For the 1000 V range, 7 V dc is the output for 700 V rms
I ,
full-scale input. See Table 8-8 for the AC Converter
stage gains for the
10, 100, and 1000 volt ranges.
Table 8·8 AC Converter Stage Gains
10" , lit .. . l..,
Vllt ...
Oltput
,
.
> V
"2
,
,
1 0 V
1120
.
.
100 V
1/200
l000V'
1/400
1 . 1 5
.0025
'100 V ,m. m.x.
8-170. The dc output from the AC Converter connects
through a portion of the Input Switching (see Figure
8-33) on the way to the Input Amplifier. The Input
Amplifier is switched to a XI gain for the ac mode.
Refer to DC Volts Measurement Paragraphs 8-30, 8-40,
and 8-48 for circuit descriptions of the Input Switching,
Input Amplifier, and AID Converter respectively.
,
- -
-
- - - - -
- -
---
-
---
-
--
-
-
0 1 1 0
0103
�-----
------_. _ _
. _ . . _ . _ _
INPUT
AMPLIfIER
Figure 8·33. AC Converter, Output Signal Path.
llltolo ..
V,I
l""
RMS CG
...
••.
G.;n
G.iI
G.i.
Goi.
Tot.1
,
.
2.'
> 0
8
.0 '
8
2 '
1
,
.005
2.'
8
. 1
.
.01
8
---
-
. ,
. . _ .
8· 1 7 1 . RATIO MEASUREMENTS.
8-172. During a ratio measurement, three complete
measurement cycles are done. The first cycle is either a
DCV, ACV, or ACV + DCV measurement (dependent
upon the ratio function selected). During this cycle
Autozero
is
always
enabled
microprocessor for local operation. For remote opera­
tion,
Autozero should not
intrument's controller. A controller error message will
be displayed if Autozero is disabled. The second and
third cycles are the DC Reference measurements with
Autozero
disabled
(disabled
Microprocessor). During the second cycle, a Reference
High Measurement is taken (see Figure 8-35). A
Reference Low is taken (see Figure 8-36) during the
third measurement cycle.
8-173. For DCV/DCV Ratio measurements, relay KI02
and FET switch QI09 (100 and 1000 V ranges) or KI03
and FET switch Q I 1 6 (.1, I, and 10 V ranges) are closed
during the signal voltage measurement (first cycle). The
relay (K102 or K103) for the selected voltage range re­
mains closed during the Reference Voltage measure­
ment (second and third cycle) but the associated FET
switch (QI09 or QI16) is open. For ACV/DCV or
ACV + DCV IDCV Ratio Measurements, FET switch
Q l lO is closed for the signal voltage measurement but is
open during the Reference Voltage measurements.
8-174. All of the voltages measured during the Ratio
measurement cycles are referenced to the VOLTS LOW
terminal. Measurement data is transferred from the In­
guard Logic to the Outguard Logic where the Ratio
measurement is computed (see Ratio formula Figure
8-35). Measurement errors due to lead resistance (Rle ad )
between the RATIO REF 4WR LO and VOLTS LO afe
subtracted during these computations.
8-175. The voltage measurement circuit paths fOf the
Reference High (H4WH and LMES, FET's Q I 15 and
QI03 enabled) and the Reference Low (HGND, FET
QI05 enabled) are highlighted in the respective
Reference High (see Figure 8-35) and Reference Low
(see Figure 8-36) illustrations.
by
the Outguard
be disabled
by
the
by
O u t guard
8-29a

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