Using Status And Control Lines - HP 9000 Series 300 Tutorials Manual
Device i/o and user interfacing hp-ux concepts and tutorials
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Also See for HP 9000 Series 300:
- Owner's manual (162 pages) ,
- Hardware configuration manual (157 pages) ,
- Service handbook (108 pages)
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Using Status and Control Lines
Four special-purpose (status and control) signal lines are available for a variety
of uses. Two of the lines are for output (CTLO and CTL1), and two are for
input (STIO and STl1). The routine gpio_set_ctl allows you to control the
values of CTLO and CTL1, while the routine gpio_get_status allows you to
read the values of STIO and STH.
Driving CTLO and CTL 1
The call to gpio_set_ctl has the following form:
gpio_set_ctl(eid. value);
where eid is the entity identifier for an open GPIO interface file and value is an
integer whose least significant two bits are mapped to CTLO (bit 0) and CTL1
(bit 1). Both CTLO and CTL1 are ground-true logic meaning that they are at
a logic LOW level when asserted. This logic polarity cannot be changed. Logic
sense of the two lines is related to value as follows:
• If value =0: CTLO and CTL1 both false (HIGH logic level)
• If value =1: CTLO true (LOW logic level) and CTL1 false (HIGH logic
level)
• If value =2: CTLO false (HIGH logic level) and CTLI true (LOW logic
level)
• If value =3: CTLO and CTL1 both true (LOW logic level)
This example code segment asserts both lines, setting them at a logic LOW
level:
int eid;
/*entity identifier*/
eid
=
open("/dev/raw_gpio". O_RDWR);
/*open interface file*/
gpio_set_ctl( eid. 3);
/*assert CTLO and CTL1*/
To set both lines to a logic HIGH level, call gpio_set_ctl as follows:
gpio_set_ctl( eid. 0);
Controlling the GPIO Interface
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