Asus Aaeon FWS-7821 User Manual
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Asus Aaeon FWS-7821 User Manual

Asus Aaeon FWS-7821 User Manual

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FWS-7821
Network Appliance
User's Manual 2
nd
Ed
Last Updated: March 23, 2017
Table of Contents
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Summary of Contents for Asus Aaeon FWS-7821

  • Page 1 FWS-7821 Network Appliance User’s Manual 2 Last Updated: March 23, 2017...
  • Page 2 Copyright Notice This document is copyrighted, 2017. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp.  Intel, Pentium, Celeron, and Xeon are registered trademarks of Intel Corporation  Core, Atom is a trademark of Intel Corporation ...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity FWS-7821  EAR bracket kit  Console cable  If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. All cables and adapters supplied by AAEON are certified and in accordance with the material safety laws and regulations of the country of sale.
  • Page 7 As most electronic components are sensitive to static electrical charge, be sure to ground yourself to prevent static charge when installing the internal components. Use a grounding wrist strap and contain all electronic components in any static-shielded containers. If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii.
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Embedded Box PC/ Industrial System 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○ 连接器及线材...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Embedded Box PC/ Industrial System Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...

  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications ..................1 Specifications ......................2 Chapter 2 – Hardware Information ..................5 Dimensions ....................... 6 Jumpers and Connectors ..................11 List of Jumpers ....................... 14 2.3.1 CFD Voltage 3.3V/5V Selection (JP1) ..........15 2.3.2 Auto PWRBTN Selection (JP2) ............
  • Page 12 Setup Submenu: Main ..................44 Setup Submenu: Advanced ................. 45 3.4.1 Advanced: Trusted Computing .............. 46 3.4.2 Advanced: Hardware monitor ............... 47 3.4.2.1 Hardware monitor: Smart Fan Mode Configuration (Manual Mode) ................... 48 3.4.2.2 Hardware monitor: Smart Fan Mode Configuration (Automatic Mode) ..................
  • Page 13 3.5.3.3 PCH Configuration: SATA Configuration (IDE) ....69 3.5.3.4 PCH Configuration: SATA Configuration (AHCI) ....70 3.5.3.5 PCH Configuration: SATA Configuration (RAID) ....71 Setup submenu: Server Mgmt (Option) ............72 3.6.1 Server Mgmt: System Event Log ............74 3.6.2 Server Mgmt: BMC self test log ............75 3.6.2 Server Mgmt: View FRU information ...........

  • Page 14: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...

  • Page 15: Specifications

    Specifications System Intel® FCBGA Xeon D-1548/D-1518 Processor  (Optional) SOC 4 x 288-pin DDR4 1600/1867/2133MHz System Memory  RDIMM up to 128GB Chipset  Intel® Ethernet Controller I210-AT Ethernet  Up to 24 x 10/100/1000Base-TX Ethernet port (Optional w/ NIM), AMI BIOS BIOS ...
  • Page 16 NIM slots x 3 RJ45 IPMI x 1 10GbE SFP+ x 2 RJ45 Console x 1 LCM display and 4 keypad x 1 Software Programmable Switch x 1 AC power input x 1 Rear Panel I/O  Power Switch x 1 Expansion Slot x 1 (optional 1 x PCIe [x4], with PCIe [x8] connector) VGA port (optional)
  • Page 17 Environmental 0 ~40°C (32 ~ 104°F) Operating Temperature  -20 ~60°C (-4 ~140°F) Storage Temperature  10%~80% relative humidity, non-condensing Operating Humidity  10%~80% @ 40°C, non-condensing Storage Humidity  0.5 Grms/5~500Hz/ operation Anti-Vibration  1.5 Grms/5~500Hz/ non-operation 10G peak acceleration (11m sec. duration), Anti-Shock ...

  • Page 18: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...

  • Page 19: Dimensions

    Dimensions System Chapter 2 – Hardware Information...
  • Page 20 Board Chapter 2 – Hardware Information...
  • Page 21 Chapter 2 – Hardware Information...
  • Page 22 PER-T362 Chapter 2 – Hardware Information...
  • Page 23 Chapter 2 – Hardware Information...

  • Page 24: Jumpers And Connectors

    Jumpers and Connectors Component Side Chapter 2 – Hardware Information...
  • Page 25 Solder Side Chapter 2 – Hardware Information...
  • Page 26 PER-T362 Chapter 2 – Hardware Information...

  • Page 27: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function CF POWER Selection Auto PWRBTN Selection IPMI PWRBTN Setting Selection CMOS1 CMOS setting selection Chapter 2 – Hardware Information...

  • Page 28: Cfd Voltage 3.3V/5V Selection (Jp1)

    2.3.1 CFD Voltage 3.3V/5V Selection (JP1) 1 2 3 1 2 3 +5V (Default) +3.3 V 2.3.2 Auto PWRBTN Selection (JP2) 1 2 3 1 2 3 Don’t use Auto PWRBTN (Default) Use Auto PWRBTN 2.3.3 IPMI PWRBTN Setting Selection (JP3) W/O IPMI Card (Default) W/ IPMI Card 2.3.4 CMOS Setting Selection (CMOS1)

  • Page 29: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function DIMM1~4 DDR4 RDIMM socket ATX1 24-pin ATX power supply input ATX_CPU1 8P ATX power supply input SYS_FAN1,3,5 4-pin smart fan CN12...

  • Page 30: Power Switch Header (Cn1)

    2.4.1 Power Switch Header (CN1) Signal Signal Power Button 2.4.2 Digital I/O (DIO1) This connector offers 4-pair of digital I/O functions and address is 801H. The pin definitions are illustrated below: Signal Signal Digital- Digital- IN/OUT IN/OUT(Port1 Bit 1) (Port1 Bit 2) Digital- IN/OUT Digital- IN/OUT (Port1 Bit 4)

  • Page 31: Front Panel Connector 1 (Fp1)

    8 in Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 GPI 11 GPI 12 GPI 14 GPI 15 GPO 34 GPO 35 GPO 63 GPO 47 8 out Pin 1 Pin 2 Pin 3 Pin 4 Pin 5...

  • Page 32: Usb3.0 Box Header (Usb1)

    2.4.5 USB3.0 Box Header (USB1) Signal Signal +5V_USB USBP_1P USB3_RX1_DN USBP_1N USB3_RX1_DP USB3_TX2_DP USB3_TX1_DN USB3_TX2_DN USB3_TX1_DP USB3_RX2_DP USBP_0N USB3_RX2_DN USBP_0P +5V_USB N.C. N.C. 2.4.6 USB3.0 Box Header (USB2) Signal Signal +5V_USB N.C. USB3_RX1_DN N.C. USB3_RX1_DP USB3_TX2_DP USB3_TX1_DN USB3_TX2_DN Chapter 2 – Hardware Information...
  • Page 33 USB3_TX1_DP USB3_RX2_DP N.C. USB3_RX2_DN N.C. +5V_USB N.C. N.C. Chapter 2 – Hardware Information...

  • Page 34: List Of Connectors (Per-T362)

    List of Connectors (PER-T362) Please refer to the table below for all of the module’s connectors that you can configure for your application Label Function Reset Switch (By Control) USB 3.0 Connector IPMI IPMI Connector CONSOLE CONSOLE Connector 10/100/1000 Base Ethernet Connector SFP+1 10G SFP+ Fiber Connector SFP+2...

  • Page 35: Installing 2.5" Hard Disk Drives (2 Pieces)

    Installing 2.5” Hard Disk Drives (2 Pieces) Remove the highlighted screws From the front of the system, slide it upwards to remove Chapter 2 – Hardware Information...
  • Page 36 Remove the four highlighted screws to remove the HDD bracket Chapter 2 – Hardware Information...
  • Page 37 Place the HDDs into the bracket, tighten the screws to secure Chapter 2 – Hardware Information...
  • Page 38 Place the assembled HDDs back into the system, secure with screws and reattach the SATA and power cables. Chapter 2 – Hardware Information...
  • Page 39 Chapter 2 – Hardware Information...

  • Page 40: Installing 2.5" Hard Disk Drives (4 Pieces)

    Installing 2.5” Hard Disk Drives (4 Pieces) Remove the highlighted screws From the front of the system, slide it upwards to remove Chapter 2 – Hardware Information...
  • Page 41 Remove the eight highlighted screws to remove the HDD brackets Chapter 2 – Hardware Information...
  • Page 42 Place the HDDs into the bracket, tighten the screws to secure Chapter 2 – Hardware Information...
  • Page 43 Place the assembled HDDs back into the system, secure with screws and reattach the SATA and power cables. Chapter 2 – Hardware Information...
  • Page 44 Chapter 2 – Hardware Information...
  • Page 45 Chapter 2 – Hardware Information...
  • Page 46 Chapter 2 – Hardware Information...

  • Page 47: Installing 3.5" Hard Disk (1 Piece)

    Installing 3.5” Hard Disk (1 Piece) Remove the highlighted screws From the front of the system, slide it upwards to remove Chapter 2 – Hardware Information...
  • Page 48 Remove the screws to remove the bracket Place the 3.5” HDD on the bracket, secure with screws on the underside Chapter 2 – Hardware Information...
  • Page 49 Put the assembled HDD on the HDD bay, secure with screws and reattach the SATA and power cables Chapter 2 – Hardware Information...

  • Page 50: Installing Expansion Card

    Installing Expansion Card Remove the highlighted screws From the front of the system, slide it upwards to remove Chapter 2 – Hardware Information...
  • Page 51 Remove the screw to remove the cover bracket Firmly insert the expansion card into the slot and secure the screw. Chapter 2 – Hardware Information...

  • Page 52: Installing Network Interface Module

    2.10 Installing Network Interface Module Remove the highlighted screws to remove the NIM cover Remove the highlighted screws to remove the NIM Chapter 2 – Hardware Information...
  • Page 53 Insert the NIM and secure with screws Close the NIM cover and secure with screws Chapter 2 – Hardware Information...

  • Page 54: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...

  • Page 55: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, a few short beeps or an error message will be outputted. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory.

  • Page 56: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press ...

  • Page 57: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...

  • Page 58: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...

  • Page 59: Advanced: Trusted Computing

    3.4.1 Advanced: Trusted Computing Options summary: Security Device Support Disable Enable Default Enable or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. Chapter 3 – AMI BIOS Setup...

  • Page 60: Advanced: Hardware Monitor

    3.4.2 Advanced: Hardware monitor Options summary: CPU Fan 1 Smart Control Disabled Enabled Default Allows BIOS to En/Disable CPU Fan 1 Smart Control CPU Fan 2 Smart Control Disabled Enabled Default Allows BIOS to En/Disable CPU Fan 2 Smart Control SYS Fan 1 Smart Control Disabled Enabled Default...

  • Page 61: Hardware Monitor: Smart Fan Mode Configuration

    3.4.2.1 Hardware monitor: Smart Fan Mode Configuration (Manual Mode) Options summary: FAN Control Mode Manual Mode Automatic Mode Default Manual Mode: Depends on PWM Duty. Automatic Mode: FAN Speed is depends on CPU Temperature. PWM Duty 0 – 255 Default (200) Manual Mode PWM Duty value Range:[0 - 255] Chapter 3 –...

  • Page 62: Hardware Monitor: Smart Fan Mode Configuration

    3.4.2.2 Hardware monitor: Smart Fan Mode Configuration (Automatic Mode) Options summary: Manual Mode FAN Control Mode Automatic Mode Default Smart Fan Mode Select. Spin PWM 0 ~ 255 Default (100) The PWM Duty of FAN Spin Range:[0 - 255] Off Control Temperature 0 ~ 127 Default (30) Temperature Limit Value of Fan Off.

  • Page 63: Advanced: Jmb36X Ata Controller Configuration

    PWM SLOPE Selection 3.4.3 Advanced: JMB36X ATA controller Configuration Chapter 3 – AMI BIOS Setup...

  • Page 64: Advanced: Serial Port Console Redirection

    3.4.4 Advanced: Serial Port Console Redirection Options summary: Enabled Default Console Redirection Disabled Console Redirection Enable or Disable. Com0 Default Legacy Console Redirection Com1 Select Legacy Console Redirection port Enabled Console Redirection(EMS) Default Disabled Microsoft Windows Emergency Management Services (EMS) allows for remote management of a Windows Server OS through a serial port.

  • Page 65: Redirection Settings

    3.4.4.1 Serial Port Console Redirection: COM0 Console Redirection Settings Options summary: Terminal Type VT100 VT100+ VT-UTF8 Default ANSI Bits per second 9600 19200 38400 57600 Default 115200 Data Bits Default Chapter 3 – AMI BIOS Setup...
  • Page 66 Parity None Default Even Mark Space Stop Bits Default Flow Control None Default Hardware RTS/CTS VT-UTF8 Combo Key Support Enabled Default Disabled Recorder Mode Enabled Disabled Default Resolution 100x31 Enabled Disabled Default Legacy OS Redirection Resolution 80x24 Default 80x25 Putty Keypad VT100 Default LINUX...

  • Page 67: Settings

    3.4.4.2 Serial Port Console Redirection: Console Redirection Settings Options summary: Out-of-Band Mgmt Port COM0 Default COM1 Terminal Type VT100 VT100+ Default VT-UTF8 ANSI Bits per second 9600 19200 57600 Default 115200 Flow Control None Default Hardware RTS/CTS Software Xon/Xoff Chapter 3 – AMI BIOS Setup...

  • Page 68: Advanced: Sio Configuration

    3.4.5 Advanced: SIO Configuration Chapter 3 – AMI BIOS Setup...

  • Page 69: Sio Configuration: Serial Port1 Configuration

    3.4.5.1 SIO Configuration: Serial Port1 Configuration Options summary: Use This Device Disabled Enabled Default Enable or Disable this Logical Device. Possible: Change Settings Auto Default IO=3F8h; IRQ=4; IO=2F8h; IRQ=3; Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 70: Sio Configuration: Serial Port2 Configuration

    3.4.5.2 SIO Configuration: Serial Port2 Configuration Options summary: Use This Device Disabled Enabled Default Enable or Disable this Logical Device. Possible: Change Settings Auto Default IO=2F8h; IRQ=3; IO=3F8h; IRQ=4; Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 71: Sio Configuration: Parallel Port Configuration

    3.4.5.3 SIO Configuration: Parallel Port Configuration Options summary: Use This Device Disabled Enabled Default Enable or Disable this Logical Device. Possible: (Parallel Port) Auto Default IO=378h; IRQ=5; IO=378h; IRQ=5,6,7,9,10;11,12 IO=278h; IRQ=5,6,7,9,10;11,12 IO=3BCh; IRQ=5,6,7,9,10;11,12; Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 72: Advanced: Usb Configuration

    3.4.6 Advanced: USB Configuration Options summary: Legacy USB Support Enabled Default Disabled Auto Enables BIOS Support for Legacy USB Support. When enabled, USB can be functional in legacy environment like DOS. AUTO option disables legacy support if no USB devices are connected Chapter 3 –...

  • Page 73: Advanced: Digital Io Port Configuration

    3.4.7 Advanced: Digital IO Port Configuration Options summary: DIO_P#1~4 Input Default Output Allows BIOS to select input/output function to corresponding DIO ping. DIO_P#5~8 Input Default Output Allows BIOS to select input/output function to corresponding DIO ping. DIO_P#1~4 Direction Default Allows BIOS to select high/low voltage level to output to corresponding DIO ping. Chapter 3 –...

  • Page 74: Advanced: Power Management

    3.4.8 Advanced: Power Management Options summary: Resume from PCIE Enabled Default Disabled Enable/Disable Resume from PCIE. Resume from RI Enabled Default Disabled Enable/Disable Resume from Ring Chapter 3 – AMI BIOS Setup...

  • Page 75: Advanced: Lan Bypass Configuration

    3.4.9 Advanced: LAN Bypass Configuration Options summary: LAN Bypass Status LED LED OFF Default Configuration RED LED ON RED LED BLINK RED LED FAST BLINK GREEN LED ON GREEN LED BLINK GREEN LED FAST BLINK LAN Bypass Kit Configuration Mode for power-on PassTru Default Bypass...

  • Page 76: Setup Submenu: Intelrcsetup

    Setup submenu: IntelRCSetup Chapter 3 – AMI BIOS Setup...

  • Page 77: Intelrcsetup: Processor Configuration

    3.5.1 IntelRCSetup: Processor Configuration Options summary : Disabled Hyper-threading[All] Enabled Default Enabled Hyper-Threading (Software Method to Enable/Disable Logical Processor threads.) Disabled Default EIST (P-states) Enabled When enabled, OS sets CPU frequency according load. When disabled, CPU frequency is set at max non-turbo. Chapter 3 –...

  • Page 78: Intelrcsetup: Memory Configuration

    3.5.2 IntelRCSetup: Memory Configuration Chapter 3 – AMI BIOS Setup...

  • Page 79: Intelrcsetup: Pch Configuration

    3.5.3 IntelRCSetup: PCH Configuration Chapter 3 – AMI BIOS Setup...

  • Page 80: Pch Configuration: Pch Devices

    3.5.3.1 PCH Configuration: PCH Devices Options summary: PCH state after G3 Last State Default Select AC power state when power is re-applied after a power failure. Chapter 3 – AMI BIOS Setup...

  • Page 81: Pch Configuration: Pci Express Configuration

    3.5.3.2 PCH Configuration: PCI Express Configuration Options summary: PCIe Speed Auto Gen1 Default Gen2 Select PCI Express port 1 speed. Chapter 3 – AMI BIOS Setup...

  • Page 82: Pch Configuration: Sata Configuration (Ide)

    3.5.3.3 PCH Configuration: SATA Configuration (IDE) Chapter 3 – AMI BIOS Setup...

  • Page 83: Pch Configuration: Sata Configuration (Ahci)

    3.5.3.4 PCH Configuration: SATA Configuration (AHCI) Chapter 3 – AMI BIOS Setup...

  • Page 84: Pch Configuration: Sata Configuration (Raid)

    3.5.3.5 PCH Configuration: SATA Configuration (RAID) Options summary: SATA Controllers Disabled Enabled Default En/Disable SATA Controller. SATA Mode AHCI Default RAID IDE: Configure SATA controllers as legacy IDEAHCI: Configure SATA controllers to operate in AHCI mode Alternate Device ID on RAID Disabled Default Enabled Enable alternate device ID on RAID devices.

  • Page 85: Setup Submenu: Server Mgmt (Option)

    Setup submenu: Server Mgmt (Option) Options summary: BMC Support Disabled Default Enabled En/Disable BMC controller. Wait For BMC Disabled Default Enabled Wait For BMC response for specified time out. In PILOTII, BMC starts at the same time when BIOS starts during AC power ON. It takes around 30 seconds to initialize Host to BMC interfaces.
  • Page 86 FRB-2 Timer Policy Do Nothing Default Reset Power Down Power Cycle Configure how the system should respond if the FRB-2 Timer expires. Not available if FRB-2 Timer is disabled. OS Watchdog Timer Disabled Enabled Default If enabled, starts a BIOS timer which can only be shut off by Management Software after the OS loads.

  • Page 87: Server Mgmt: System Event Log

    3.6.1 Server Mgmt: System Event Log Options summary: SEL Components Disabled Enabled Default Change this to enable or disable all features of System Event Logging during boot. Erase SEL Yes, On next reset Default Yes, On every reset Choose options for erasing SEL. When SEL is Full Do Nothing Default...

  • Page 88: Server Mgmt: Bmc Self Test Log

    3.6.2 Server Mgmt: BMC self test log Options summary: Erase Log Yes, On every reset Default Erase Log options. When log is full Clear Log Default Do not log any more Select the action to be taken when log is full. Chapter 3 –...

  • Page 89: Server Mgmt: View Fru Information

    3.6.2 Server Mgmt: View FRU information Chapter 3 – AMI BIOS Setup...

  • Page 90: Server Mgmt: Bmc Network Configuration

    3.6.3 Server Mgmt: BMC network configuration Options summary: Configuration Address Unspecified Default source Static DynamicBmcDhcp DynamicBmcNonDhcp Select to configure LAN channel parameters statically or dynamically(by BIOS or BMC). Unspecified option will not modify any BMC network parameters during BIOS phase Chapter 3 –...

  • Page 91: Bmc Network Configuration: View System Event Log

    3.6.3.1 BMC network configuration: View System Event Log Chapter 3 – AMI BIOS Setup...

  • Page 92: Bmc Network Configuration: Bmc User Settings

    3.6.3.2 BMC network configuration: BMC User Settings Options summary: Add User User Name Default User Password Channel No User Privilege Limit Press to add a User. Delete User User Name Default User Password Press to delete a User. Change User Settings User Name Default...

  • Page 93: Setup Submenu: Security

    Setup submenu: Security Change User/Administrator Password You can set a User Password once an Administrator Password is set. The password will be required during boot up, or when the user enters the Setup utility. Please Note that a User Password does not provide access to many of the features in the Setup utility. Select the password you wish to set, press Enter to open a dialog box to enter your password (you can enter no more than six letters or numbers).

  • Page 94: Setup Submenu: Boot

    Setup submenu: Boot Options summary: Quiet Boot Disabled Default Enabled En/Disable showing boot logo. Launch PXE OpROM Disabled Default Enabled En/Disable Legacy Boot Option. Chapter 3 – AMI BIOS Setup...

  • Page 95: Setup Submenu: Save & Exit

    Setup submenu: Save & Exit Chapter 3 – AMI BIOS Setup...

  • Page 96: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...

  • Page 97: Drivers Installation

    Drivers Installation The drivers can be found in the product page for FWS-8500 at aaeon.com. Please follow the sequence below to install the drivers. Step 1 – Install Chipset Driver Open the Step 1 - Chipset folder followed by the SetupChipset.exe file Follow the instructions Drivers will be installed automatically Step 2 –...

  • Page 98: Appendix A - Watchdog Timer Programming

    Appendix A Appendix A - Watchdog Timer Programming...

  • Page 99: Watchdog Timer Initial Program

    A.1 Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Watchdog relative register table Register BitNum Value...
  • Page 100 ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Watch Dog relative definition (Please reference to Table 2) #define byte TimerLDN //This parameter is represented from Note3 #define byte TimerReg //This parameter is represented from Note4 #define byte TimerVal // This parameter is represented from Note24...
  • Page 101 ************************************************************************************ VOID Main(){ // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. AaeonWDTEnable(); ************************************************************************************ Appendix A – Watchdog Timer Programming...
  • Page 102 ************************************************************************************ // Procedure : AaeonWDTEnable VOID AaeonWDTEnable (){ WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 1); // Procedure : AaeonWDTConfig VOID AaeonWDTConfig (){ // Disable WDT counting WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 0); // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting(); VOID WDTEnableDisable(byte LDN, byte Register, byte BitNum, byte Value){ SIOBitSet(LDN, Register, BitNum, Value);...
  • Page 103 ************************************************************************************ VOID SIOEnterMBPnPMode(){ Switch(SIOIndex){ Case 0x2E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0x55); Break; Case 0x4E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0xAA); Break; VOID SIOExitMBPnPMode(){ IOWriteByte(SIOIndex, 0x02); IOWriteByte(SIOData, 0x02); VOID SIOSelectLDN(byte LDN){ IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, LDN);...
  • Page 104 ************************************************************************************ VOID SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value){ Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 << BitNum); TmpValue |= (Value << BitNum); IOWriteByte(SIOData, TmpValue); SIOExitMBPnPMode(); VOID SIOByteSet(byte LDN, byte Register, byte Value){ SIOEnterMBPnPMode();...

  • Page 105: Appendix B - I/O Information

    Appendix B Appendix B - I/O Information...

  • Page 106: I/O Address Map

    I/O Address Map Appendix B – I/O Information...
  • Page 107 Appendix B – I/O Information...

  • Page 108: Memory Address Map

    Memory Address Map Appendix B – I/O Information...
  • Page 109 Appendix B – I/O Information...
  • Page 110 Appendix B – I/O Information...

  • Page 111: Irq Mapping Chart

    IRQ Mapping Chart Appendix B – I/O Information...
  • Page 112 Appendix B – I/O Information...
  • Page 113 Appendix B – I/O Information...
  • Page 114 Appendix B – I/O Information...
  • Page 115 Appendix B – I/O Information...
  • Page 116 Appendix B – I/O Information...
  • Page 117 Appendix B – I/O Information...
  • Page 118 Appendix B – I/O Information...
  • Page 119 Appendix B – I/O Information...
  • Page 120 Appendix B – I/O Information...
  • Page 121 Appendix B – I/O Information...
  • Page 122 Appendix B – I/O Information...
  • Page 123 Appendix B – I/O Information...
  • Page 124 Appendix B – I/O Information...
  • Page 125 Appendix B – I/O Information...
  • Page 126 Appendix B – I/O Information...
  • Page 127 Appendix B – I/O Information...

  • Page 128: Appendix C - Standard Lan Bypass Platform Setting

    Appendix C Appendix C - Standard LAN Bypass Platform Setting...

  • Page 129: Status Led

    Status LED The LED status indicator of FWS-7520 is programmable with AAEON SDK for your application. Table1: LED Status STA_LED2 STA_LED1 STA_LED0 LED Off Red LED On Red LED Blink Red LED Fast Blink Reserved Green LED Blink Green LED Fast Blink Green LED On Table2: Status LED and register mapping table CPLD Slave Address 0x90 (Note1)
  • Page 130 Sample Code: ***************************************************************************************** #define Byte CPLD_SLAVE_ADDRESS //This parameter is represented from Note1 #define Byte OFFSET //This parameter is represented from Note2 ***************************************************************************************** bData = aaeonSmbusReadByte(CPLD_SLAVE_ADDRESS, OFFSET); switch( LED_FLAG) case 0: //LED Off //BIT2=0, BIT1=0, BIT0=0 bData = bData & 0xF8; break;...
  • Page 131 bData = (bData & 0xF8) | 0x07; break; case 5: //Green LED Blink //BIT2=1, BIT1=0, BIT0=1 bData = (bData & 0xF8) | 0x05; break; case 6: //Green LED Fast Blink //BIT2=1, BIT1=1, BIT0=0 bData = (bData & 0xF8) | 0x06; break;...

  • Page 132: Lan Bypass

    LAN Bypass Table1: LAN Kit ID Select LAN_ID2 LAN_ID1 LAN_ID0 LAN kit selected LAN Kit 1 Selected LAN Kit 2 Selected LAN Kit 3 Selected LAN Kit 4 Selected LAN Kit 5 Selected LAN Kit 6 Selected Table2: LAN Bypass register table Function Description LAN_ID3...
  • Page 133 Table3: LAN Bypass register mapping table CPLD Slave Address 0x90 (Note1) Attribute Offset(SMBUS) BitNum Value LAN_ID3 0x01(Note2) (Table 1) LAN_ID2 0x01(Note2) (Table 1) LAN_ID1 0x01(Note2) (Table 1) LAN_ID0 0x01(Note2) (Table 1) PWR_ON 0x01(Note2) (Table 2) PWR_OFF 0x01(Note2) (Table 2) WDT_EN 0x01(Note2) (Table 2) ACT_EN...
  • Page 134 // Set Reg01h bit0 if(bLanSel & 0x01) bData = bData | 0x01; else bData = bData & 0xFE; // Power On Action (Reg01h bit6) if(SET_PASS_THROUGH) // Pass Through bData = bData & 0xBF; else // Bypass bData = bData | 0x40; // Power Off Action (Reg01h bit5) if(SET_PASS_THROUGH) // Pass Through bData = bData &...

  • Page 135: Software Reset Button (General Propose Input)

    Software Reset Button (General Propose Input) Table 1: Soft Reset Button register mapping table Attribute Register(I/O) BitNum Value BTN_STS 0xA05(Note1) 4(Note2) (Note3) Table 2: LAN Bypass register table Function Description Reading this register returns the pin level status which is normal high active low.

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