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Asus AAEON FWS-7821 User Manual

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FWS-7821
Network Appliance
User's Manual 5
th
Ed
Last Updated: April 25, 2019
Table of Contents
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Summary of Contents for Asus AAEON FWS-7821

  • Page 1 FWS-7821 Network Appliance User’s Manual 5 Last Updated: April 25, 2019...
  • Page 2 Copyright Notice This document is copyrighted, 2019. All rights are reserved. The original manufacturer reserves the right to make improvements to the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated, or transmitted in any form or by any means without the prior written permission of the original manufacturer.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp.  Intel, Pentium, Celeron, and Xeon are registered trademarks of Intel Corporation  Core, Atom is a trademark of Intel Corporation ...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity FWS-7821  EAR bracket kit  Console cable  If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
  • Page 5 About this Document This User’s Manual contains all the essential information, such as detailed descriptions and explanations on the product’s hardware and software features (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the product page on AAEON.com for the latest version of this document.
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. All cables and adapters supplied by AAEON are certified and in accordance with the material safety laws and regulations of the country of sale.
  • Page 7 As most electronic components are sensitive to static electrical charge, be sure to ground yourself to prevent static charge when installing the internal components. Use a grounding wrist strap and contain all electronic components in any static-shielded containers. If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii.
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Embedded Box PC/ Industrial System 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○ 连接器及线材...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Embedded Box PC/ Industrial System Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...

  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications..................1 Specifications ......................2 Chapter 2 – Hardware Information ..................6 Dimensions ....................... 7 Jumpers and Connectors ..................13 List of Jumpers ......................18 2.3.1 Auto PWR Button (JP1) ................18 2.3.2 Clear CMOS (CN14) .................
  • Page 12 3.4.3 Advanced: Trusted Computing ............. 49 3.4.4 Advanced: Hardware Monitor ............... 51 3.4.4.1 Smart Fan Function ..............52 3.4.5 Advanced: SIO Configuration ............... 54 3.4.5.1 Serial Port 1 Configuration ............55 3.4.5.2 Serial Port 2 Configuration ............56 3.4.5.3 Parallel Port Configuration ............57 3.4.6 Advanced: LAN Bypass Configuration..........
  • Page 13 Appendix C - Standard LAN Bypass Platform Setting ............. 104 Status LED ......................105 C.1.2 Status LED Configuration..............105 C.1.3 Satus LED Sample Code ..............106 LAN Bypass ......................108 C.2.1 LAN Bypass Configuration ..............108 C.2.2 LAN Bypass Sample Code ..............110 Software Reset Button (General Propose Input) ..........

  • Page 14: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...

  • Page 15: Specifications

    Specifications Platform 1U Rackmount Network Platform Form Factor Intel® 6th/7th Generation Core™/ Xeon Processor Processors Intel® C236 Chipset DDR4 1866/2133/2400 UDIMM/ECC Up to 64GB System Memory 288-pin DIMM x 4 Network Ethernet Intel® i211 GbE x 6 + Intel® i210 GbE x 2 (SFP) NIM x 1 (Or i211 GbE x8 +NIMx1) UDIMM/ECC Bypass Onboard 2 pairs bypass, others depend on NIM...
  • Page 16 Storage Internal 2.5” SATA HDD x 2 or 3.5” SATA HDD x 1 HDDs (optional) Optional BOM CFast™ socket or mSATA slot or CF/CFast/mSATA CF™ socket (optional) Expansion/Internal Interface Up to PCIe x 2 [x8] slots PCIe slot Mini Card x 1 Mini-PCIe slot Pin-header Keyboard and Mouse...
  • Page 17 Environmental Parameters and Dimension 250W ATX PSU Power Requirement 32°F ~ 104°F (0°C ~ 40°C) Operation Temp. -4°F ~ 140°F (-20°C ~ 60°C) Storage Temp. 10% ~ 80% relative humidity, non-condensing Operating Humidity 10% ~ 80% @ 40°C, non-condensing Storage Humidity 0.5 Grms/ 5 ~ 500Hz/ operation (3.5”...
  • Page 18 I/O Interfaces Rear Panel AC Power Input x 1 Power Switch x 1 VGA port (Optional) Rear Expansion Slot x 2 (2 x PCIe [x8] slots, NIM slot will be disabled if PCIe Riser supported) Chapter 1 – Product Specifications...

  • Page 19: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...

  • Page 20: Dimensions

    Dimensions System Chapter 2 – Hardware Information...
  • Page 21 Board Chapter 2 – Hardware Information...
  • Page 22 Chapter 2 – Hardware Information...
  • Page 23 PER-R40X NIM LAN Riser Card Chapter 2 – Hardware Information...
  • Page 24 PER-R44X Two Slot Rear PCIe Riser Card Chapter 2 – Hardware Information...
  • Page 25 PER-T354 One Slot Rear PCIe Riser Card Chapter 2 – Hardware Information...

  • Page 26: Jumpers And Connectors

    Jumpers and Connectors Board Component Side Chapter 2 – Hardware Information...
  • Page 27 Board Solder Side Chapter 2 – Hardware Information...
  • Page 28 PER-R40X NIM LAN Riser Card Chapter 2 – Hardware Information...
  • Page 29 PER-R44X Two Slot Rear PCIe Riser Card Chapter 2 – Hardware Information...
  • Page 30 PER-T354 One Slot Rear PCIe Riser Card Chapter 2 – Hardware Information...

  • Page 31: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function Auto PWR Button CN14 Clear CMOS CN27 CF Voltage SEL 2.3.1 Auto PWR Button (JP1) Auto PWR Off (Default) Auto PWR On 2.3.2 Clear CMOS (CN14)

  • Page 32: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function Front Panel DIMM1 DIMM2 DDR4 UDIMM DIMM3 DIMM4 USB1 USB3.0 EXT CON CPU FAN, SYS FAN 1 & 2 VGA CON ATX 8PIN CON Expansion slot For IPMI(Option)
  • Page 33 Label Function CN23 LCM CON CN24 CN25 CFAST PCIe Expansion slot Use with: CN28 PER-R44X For 2 x STD PCIe x8 Slot PER-T354 For 1 x STD PCIe x8 Slot CN31 PS2 CON CN32 DIO CON CN34 USB3.0 x2 CN35 LAN1~LAN4 CN36 CONSOLE Port (COM Port1)

  • Page 34: Front Panel (Fp1)

    Label Function MSATA1 MSATA CON Software Reset 2.4.1 Front Panel (FP1) Signal Signal PWR_SW# RESET PWR LED+ PWR LED- HDD LED+ HDD LED- 2.4.2 COM Port 2 (Only RS232) (COM1) Signal Signal Chapter 2 – Hardware Information...

  • Page 35: Ps2 Connector (Cn31)

    2.4.3 PS2 Connector (CN31) Signal Signal PS2_KDAT PS2_KCLK +V5S PS2_MDAT PS2_MCLK 2.4.4 DIO Connector (CN32) Signal Signal DIO1 DIO2 DIO3 DIO4 DIO5 DIO6 DIO7 DIO8 3.3V Chapter 2 – Hardware Information...

  • Page 36: Installing 2.5" Hard Disk Drives (2 Pieces)

    Installing 2.5” Hard Disk Drives (2 Pieces) Remove the highlighted screws From the front of the system, slide it upwards to remove Chapter 2 – Hardware Information...
  • Page 37 Remove the four highlighted screws to remove the HDD bracket Chapter 2 – Hardware Information...
  • Page 38 Place the HDDs into the bracket, tighten the screws to secure Chapter 2 – Hardware Information...
  • Page 39 Place the assembled HDDs back into the system, secure with screws and reattach the SATA and power cables. Chapter 2 – Hardware Information...
  • Page 40 Chapter 2 – Hardware Information...

  • Page 41: Installing 2.5" Hard Disk Drives (4 Pieces)

    Installing 2.5” Hard Disk Drives (4 Pieces) Remove the highlighted screws From the front of the system, slide it upwards to remove Chapter 2 – Hardware Information...
  • Page 42 Remove the eight highlighted screws to remove the HDD brackets Chapter 2 – Hardware Information...
  • Page 43 Place the HDDs into the bracket, tighten the screws to secure Chapter 2 – Hardware Information...
  • Page 44 Place the assembled HDDs back into the system, secure with screws and reattach the SATA and power cables. Chapter 2 – Hardware Information...
  • Page 45 Chapter 2 – Hardware Information...
  • Page 46 Chapter 2 – Hardware Information...
  • Page 47 Chapter 2 – Hardware Information...

  • Page 48: Installing 3.5" Hard Disk (1 Piece)

    Installing 3.5” Hard Disk (1 Piece) Remove the highlighted screws From the front of the system, slide it upwards to remove Chapter 2 – Hardware Information...
  • Page 49 Remove the screws to remove the bracket Place the 3.5” HDD on the bracket, secure with screws on the underside Chapter 2 – Hardware Information...
  • Page 50 Put the assembled HDD on the HDD bay, secure with screws and reattach the SATA and power cables Chapter 2 – Hardware Information...

  • Page 51: Installing Expansion Card

    Installing Expansion Card Remove the highlighted screws From the front of the system, slide it upwards to remove Chapter 2 – Hardware Information...
  • Page 52 Remove the screw to remove the cover bracket Firmly insert the expansion card into the slot and secure the screw. Chapter 2 – Hardware Information...

  • Page 53: Installing Network Interface Module

    Installing Network Interface Module Remove the highlighted screws to remove the NIM cover Remove the highlighted screws to remove the NIM Chapter 2 – Hardware Information...
  • Page 54 Insert the NIM and secure with screws Close the NIM cover and secure with screws Chapter 2 – Hardware Information...

  • Page 55: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...

  • Page 56: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization. If the routines encounter an error, it will notify the user with either a few short beeps or by displaying an error message. There are two kinds of errors, fatal and non-fatal. The system can usually continue the boot up sequence with non-fatal errors.

  • Page 57: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations. The configuration settings are stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off.

  • Page 58: Main

    Main To set Date/Time, use to switch between elements. Chapter 3 – AMI BIOS Setup...

  • Page 59: Advanced

    Advanced Chapter 3 – AMI BIOS Setup...

  • Page 60: Advanced: Cpu Configuration

    3.4.1 Advanced: CPU Configuration Options Summary Active Processor Cores All (Default) Number of cores to enable in each processor package. Hyper-threading Disabled Enabled (Default) Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and Disabled for other OS (OS not optimized for Hyper-Threading Technology). Chapter 3 –...

  • Page 61: Advanced: Sata Configuration

    3.4.2 Advanced: SATA Configuration Options Summary SATA Controller Speed Disabled Enabled (Default) Enable or disable SATA Device. SATA Mode Selection AHCI (Default) Intel RST Premium Determines how SATA controller(s) operate. Hot Plug Disabled (Default) Enabled Designates this port as Hot Pluggable. Chapter 3 –...

  • Page 62: Advanced: Trusted Computing

    3.4.3 Advanced: Trusted Computing Options Summary Security Device Support Disabled Enabled (Default) Enables or Disables BIOS support for security device. OS will not show Security Device. TCG EFI protocol and INT1A interface will not be available. TPM State Disabled Enabled (Default) Enable/Disable Security Device.
  • Page 63 Options Summary Device Select TPM 1.2 TPM 2.0 Auto (Default) TPM 1.2 will restrict support to TPM 1.2 devices, TPM 2.0 will restrict support to TPM 2.0 devices, Auto will support both with the default set to TPM 2.0 devices if not found, TPM 1.2 devices will be enumerated Chapter 3 –...

  • Page 64: Advanced: Hardware Monitor

    3.4.4 Advanced: Hardware Monitor Chapter 3 – AMI BIOS Setup...

  • Page 65: 3.4.4.1 Smart Fan Function

    3.4.4.1 Smart Fan Function Options Summary Fan 1 Smart Control Disabled Enabled (Default) Fan 2 Smart Control Disabled Enabled (Default) Fan 3 Smart Control Disabled Enabled (Default) Enable/Disable Fan Smart Control. Enabled: FAN is running in accordance with user settings. Disabled: FAN is always running with full speed Smart Fan Mode Full on Mode...
  • Page 66 Options Summary The PWM Duty of FAN Spin Range:[0 - 255] Default: 35 Temperature Source CPU Temperature(DTS) (Default) System Temperature Reference Temperature Input Selection. Off Control Temperature 15 (0-127) Temperature Limit Value of Fan Off. Note: Some fans have a minimum speed even if the PWM value is 0 Default: 15 Start Control Temperature 45 (0-127)

  • Page 67: Advanced: Sio Configuration

    3.4.5 Advanced: SIO Configuration Chapter 3 – AMI BIOS Setup...

  • Page 68: Serial Port 1 Configuration

    3.4.5.1 Serial Port 1 Configuration Options Summary Use This Device Disabled Enabled (Default) Enable or Disable this Logical Device. Possible: Use Automatic Settings (Default) IO=2F8h; IRQ=3; IO=3F8h; IRQ=4; Allows user to change Device's Resource settings. New settings will be reflected on this Setup page after System restarts.

  • Page 69: 3.4.5.2 Serial Port 2 Configuration

    3.4.5.2 Serial Port 2 Configuration Options Summary Use This Device Disabled Enabled (Default) Enable or Disable this Logical Device. Possible: Use Automatic Settings (Default) IO=2F8h; IRQ=3; IO=3F8h; IRQ=4; Allows user to change Device's Resource settings. New settings will be reflected on this Setup page after System restarts.

  • Page 70: 3.4.5.3 Parallel Port Configuration

    3.4.5.3 Parallel Port Configuration Options Summary Use This Device Disabled Enabled (Default) Enable or Disable this Logical Device. Possible: Use Automatic Settings (Default) IO=378h; IRQ=5; IO=378h; IRQ=5,6,7,9,10,11,12; IO=278h; IRQ=5,6,7,9,10,11,12; IO=3BCh;IRQ=5,6,7,9,10,11,12; Allows user to change Device's Resource settings. New settings will be reflected on this Setup page after System restarts.

  • Page 71: Advanced: Lan Bypass Configuration

    3.4.6 Advanced: LAN Bypass Configuration Options Summary STATUS LED CTRL LED OFF (Default) RED LED ON RED LED BLINK RED LED FAST BLINK GREEN LED ON GREEN LED BLINK GREEN LED FAST BLINK Configure LAN Bypass Status LED. LAN kit Power ON Bypass PassTru (Default) Set LAN kit function behavior when power on.(Bypass/Pass Through)

  • Page 72: Advanced: Serial Port Console Redirection

    3.4.7 Advanced: Serial Port Console Redirection Options Summary Console Redirection Disabled Enabled (Default) Console Redirection Enabled or Disabled. Chapter 3 – AMI BIOS Setup...

  • Page 73: Com0 Console Redirection Settings

    3.4.7.1 COM0 Console Redirection Settings Options Summary Terminal Type VT100 VT100+ VT-UTF8 ANSI (Default) Emulation: ANSI: Extended ASCII char set. VT100: ASCII char set. VT100+: Extends VT100 to support color, function keys, etc. VT-UTF8: Uses UTF8 encoding to map Unicode chars onto 1 or more bytes. Bits per second 9600 19200...
  • Page 74 Options Summary Data Bits 8 (Default) Data Bits Parity None (Default) Even Mark Space A parity bit can be sent with the data bits to detect some transmission errors. Even: parity bit is 0 if the number of 1’s in the data bits is even Odd: parity bit is 0 if number of 1’s in the data bits is odd.
  • Page 75 Options Summary Putty KeyPad VT100 (Default) LINUX XTERMR6 ESCN VT400 Select FunctionKey and KeyPad on Putty. Redirection After BIOS POST Always Enable (Default) BootLoader BootLoader: Legacy console redirection is disabled before booting to Legacy OS. Always Enable: Legacy console redirection is enabled for Legacy OS. Chapter 3 –...

  • Page 76: 3.4.7.2 Legacy Console Redirection Settings

    3.4.7.2 Legacy Console Redirection Settings Options Summary Legacy Serial Redirection Port COM0 (Default) Select a COM port to display redirection of Legacy OS and Legacy OPROM Messages Chapter 3 – AMI BIOS Setup...

  • Page 77: 3.4.7.3 Serial Port For Out-Of-Band Management/Windows Ems

    3.4.7.3 Serial Port for Out-of-Band Management/Windows EMS Options Summary Terminal Type VT100 VT100+ VT-UTF8 (Default) ANSI VT-UTF8 is the preferred terminal type for out-of-band management. The next best choice is VT100+ and then VT100. See Section 3.4.7.1 Console Redirection Settings for more Help with Terminal Type/Emulation.
  • Page 78 Options Summary Flow Control None (Default) Hardware RTS/CTS Software Xon/Xoff Flow control can prevent data loss from buffer overflow. When sending data, if the receiving buffers are full, a ‘stop’ signal can be sent to stop the data flow. Once the buffers are empty, a ‘start’...

  • Page 79: Advanced: Digital Io Port Configuration

    3.4.8 Advanced: Digital IO Port Configuration Options Summary DIO_P#1~4 Input Output (Default) Set DIO as Input or Output DIO_P#5~8 Input (Default) Output Set DIO as Input or Output Output Level High (Default) Set output level when DIO pin is output Chapter 3 –...

  • Page 80: Advanced: Power Management

    3.4.9 Advanced: Power Management Options Summary Power Mode ATX Type (Default) AT Type Select Power Supply Mode. Restore AC Power Loss Power Off Power On Last State (Default) Select AC power state when power is re-applied after a power failure. RTC Wake system from S5 Disabled (Default) Fixed time...
  • Page 81 Options Summary Wake up hour (Fixed time option) 0 (Default) Select 0-23 For example enter 3 for 3am and 15 for 3pm. Wake up minute (Fixed time option) 0 (Default) 0-59 Wake up second (Fixed time option) 0 (Default) 0-59 Wake up minute increase (Dynamic time 1 (Default) option)

  • Page 82: Chipset

    Chipset Chapter 3 – AMI BIOS Setup...

  • Page 83: Chipset: System Agent (Sa) Configuration

    3.5.1 Chipset: System Agent (SA) Configuration Chapter 3 – AMI BIOS Setup...

  • Page 84: Graphics Configuration

    3.5.1.1 Graphics Configuration Options Summary VT-d Enabled (Default) Disabled VT-d capability Primary Display Auto (Default) IGFX Select which of Auto/IGFX/PEG/PCIE Graphics device should be Primary Display or select SG for Switchable Graphics. Chapter 3 – AMI BIOS Setup...

  • Page 85: Security

    Security Set User/Administrator Password Here you can setup an Administrator Password and a User Password. An Administrator Password must be set before you can set a User Password. The password will be required during boot up, or when the User enters the Setup utility. Note: A User Password does not provide access to many of the features in the Setup utility.

  • Page 86: Boot

    Remove Password Select the password you wish to remove and press Enter. Type the current password into the dialog box that appears and press Enter. In the next dialog box, press enter to disable password protection. Boot Options Summary Quite Boot Disabled Enabled (Default) Enables/Disables Quiet Boot option.

  • Page 87: Save & Exit

    Save & Exit Chapter 3 – AMI BIOS Setup...

  • Page 88: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...

  • Page 89: Drivers Installation

    Drivers Installation Drivers for the FWS-7821 can be downloaded from the product page on the AAEON website by following this link: https://www.aaeon.com/en/p/rackmount-network-appliance-fws-7821 Download the driver(s) you need and follow the steps below to install them. Step 1 – Install Chipset Drivers Open the Step 1 - Chipset folder followed by the SetupChipset.exe file Follow the instructions Drivers will be installed automatically...
  • Page 90 Step 4 – Install ME Driver Open the Step 4 – ME folder followed by the MEISetup.exe file Follow the instructions Drivers will be installed automatically Step 5 – Install Intel RST Driver Open the Step 5 – Intel RST folder followed by the SetupRST.exe file Follow the instructions Drivers will be installed automatically Chapter 4 –...

  • Page 91: Appendix A - Watchdog Timer Programming

    Appendix A Appendix A - Watchdog Timer Programming...

  • Page 92: Watchdog Timer Initial Program

    Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Watchdog relative register table Register BitNum Value...
  • Page 93 ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Watch Dog relative definition (Please reference to Table 2) #define byte TimerLDN //This parameter is represented from Note3 #define byte TimerReg //This parameter is represented from Note4 #define byte TimerVal // This parameter is represented from Note24...
  • Page 94 ************************************************************************************ Main VOID // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. AaeonWDTEnable(); ************************************************************************************ Appendix A – Watchdog Timer Programming...
  • Page 95 ************************************************************************************ // Procedure : AaeonWDTEnable AaeonWDTEnable () VOID WDTEnableDisable( EnableLDN, EnableReg, EnableBit, 1 // Procedure : AaeonWDTConfig AaeonWDTConfig () VOID // Disable WDT counting WDTEnableDisable( EnableLDN, EnableReg, EnableBit, 0 // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting();...
  • Page 96 ************************************************************************************ SIOEnterMBPnPMode() VOID Switch(SIOIndex){ Case 0x2E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0x55); Break; Case 0x4E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0xAA); Break; SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0x02); IOWriteByte(SIOData, 0x02); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, LDN);...
  • Page 97 ************************************************************************************ SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value) VOID Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 << BitNum); TmpValue |= (Value << BitNum); IOWriteByte(SIOData, TmpValue); SIOExitMBPnPMode(); SIOByteSet(byte LDN, byte Register, byte Value) VOID SIOEnterMBPnPMode(); SIOSelectLDN(LDN);...

  • Page 98: Appendix B - I/O Information

    Appendix B Appendix B - I/O Information...

  • Page 99: I/O Address Map

    I/O Address Map Appendix B – I/O Information...
  • Page 100 Appendix B – I/O Information...

  • Page 101: Memory Address Map

    Memory Address Map Appendix B – I/O Information...
  • Page 102 Appendix B – I/O Information...

  • Page 103: Irq Mapping Chart

    IRQ Mapping Chart Appendix B – I/O Information...
  • Page 104 Appendix B – I/O Information...
  • Page 105 Appendix B – I/O Information...
  • Page 106 Appendix B – I/O Information...
  • Page 107 Appendix B – I/O Information...
  • Page 108 Appendix B – I/O Information...
  • Page 109 Appendix B – I/O Information...
  • Page 110 Appendix B – I/O Information...
  • Page 111 Appendix B – I/O Information...
  • Page 112 Appendix B – I/O Information...
  • Page 113 Appendix B – I/O Information...
  • Page 114 Appendix B – I/O Information...
  • Page 115 Appendix B – I/O Information...
  • Page 116 Appendix B – I/O Information...

  • Page 117: Appendix C - Standard Lan Bypass Platform Setting

    Appendix C Appendix C - Standard LAN Bypass Platform Setting...

  • Page 118: Status Led

    Status LED The FWS-7821 features a programmable LED status indicator. Users can program the LED status indicator with the AAEON SDK to express different statuses. C.1.2 Status LED Configuration Table 1 : Turth Table of Status LED STA_LED2 STA_LED1 STA_LED0 LED States LED Off Red Blinking (Slowly)

  • Page 119: Satus Led Sample Code

    C.1.3 Satus LED Sample Code ********************************************************************************************** #define Byte CPLD_SLAVE_ADDRESS //This parameter is represented from Note1 #define Byte OFFSET //This parameter is represented from Note2 ********************************************************************************************** bData = aaeonSmbusReadByte(CPLD_SLAVE_ADDRESS, OFFSET); switch( LED_FLAG) case 0: //LED Off //BIT2=0, BIT1=0, BIT0=0 bData = bData & 0xF8; break;...
  • Page 120 //BIT2=1, BIT1=1, BIT0=1 bData = (bData & 0xF8) | 0x07; break; case 5: //Green LED Blink //BIT2=1, BIT1=0, BIT0=1 bData = (bData & 0xF8) | 0x05; break; case 6: //Green LED Fast Blink //BIT2=1, BIT1=1, BIT0=0 bData = (bData & 0xF8) | 0x06; break;...

  • Page 121: Lan Bypass

    LAN Bypass The FWS-7821 provides a LAN Bypass kit which allows uninterrupted network traffic, even if a single in-line appliance is shut down or hangs. C.2.1 LAN Bypass Configuration Table 1 : ID Select table of LAN kit LAN_ID2 LAN_ID1 LAN_ID0 LAN kit selected LAN Kit 1 Selected...
  • Page 122 Table 3 : LAN Bypass relative register mapping table CPLD Slave Address 0x90 (Note1) Attribute Offset(SMBUS) BitNum Value LAN_ID3 0x01(Note2) (Table 1) LAN_ID2 0x01(Note2) (Table 1) LAN_ID1 0x01(Note2) (Table 1) LAN_ID0 0x01(Note2) (Table 1) PWR_ON 0x01(Note2) (Table 2) PWR_OFF 0x01(Note2) (Table 2) WDT_EN 0x01(Note2)

  • Page 123: Lan Bypass Sample Code

    C.2.2 LAN Bypass Sample Code Sample Code ********************************************************************************************** #define Byte CPLD_SLAVE_ADDRESS //This parameter is represented from Note1 #define Byte OFFSET //This parameter is represented from Note2 ********************************************************************************************** // Select Lan Pair BYTE bLanSel = LAN_PAIR; BYTE bData = SmbusReadByte(CPLD_SLAVE_ADDRESS, OFFSET); // Set Reg01h bit3 if(bLanSel &...
  • Page 124 bData = bData & 0xDF; else // Bypass bData = bData | 0x20; // WDT Action (Reg01h bit4) if(SET_WDT_RESET) // Reset bData = bData & 0xEF; else // Bypass bData = bData | 0x10; SmbusWriteByte(CPLD_SLAVE_ADDRESS, OFFSET, bData); // Apply Settings (Reg01h bit7) bData = SmbusReadByte(CPLD_SLAVE_ADDRESS, OFFSET);...

  • Page 125: Software Reset Button (General Propose Input)

    Software Reset Button (General Propose Input) The FWS-7821 features a general purpose input button. The status of the button can be read by the AAEON SDK. C.3.1 Software Reset Button Table 1 : Soft Reset Button register mapping table Attribute Register(I/O) BitNum Value...

  • Page 126: Software Reset Button Sample Code

    C.3.2 Software Reset Button Sample Code Sample Code: ************************************************************************************ #define Word BTN_STS //This parameter is represented from Note1 #define Byte BTN_STS_R //This parameter is represented from Note2 ************************************************************************************ GET_Value (Word IoAddr, Byte BitNum,Byte Value) Byte BYTE TmpValue; TmpValue = inportb (IoAddr); return (TmpValue &...

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