Hitachi SH7760 Solution Engine2 Overview
  1. Manuals
  2. Brands
  3. Hitachi Manuals
  4. Motherboard
  5. SH7760 Solution Engine2
  6. Overview
Hitachi SH7760 Solution Engine2 Overview

Hitachi SH7760 Solution Engine2 Overview

Hide thumbs
Table of Contents

Quick Links

SH7760 Solution Engine2
Overview
(MS7760CP01P)
st
1
Edition
Hitachi ULSI Systems Co., Ltd.
MS7760CP01P-M
Table of Contents
loading

Related Manuals for Hitachi SH7760 Solution Engine2

Summary of Contents for Hitachi SH7760 Solution Engine2

  • Page 1 SH7760 Solution Engine2 Overview (MS7760CP01P) Edition Hitachi ULSI Systems Co., Ltd. MS7760CP01P-M...
  • Page 2 3. This manual does not grant users the property rights and other rights of the third party or Hitachi ULSI Systems.

  • Page 4: Notes On Using The Ms7760Cp01P

    Notes on Using the MS7760CP01P Thank you for your purchasing our MS7760CP01P board (simply called Solution Engine2 in this manual). Read the following notes and cautions before using Solution Engine2. Solution Engine2 Components Confirm that the following components are all contained after unpacking. Product model: MS7760CP01P •...
  • Page 5 Safety Instructions • Read this page carefully and keep in mind the instructions before using T-Engine. CAUTION If ignored, there is a risk of death or heavy injury. WARNING If ignored, there is a risk of injury or equipment damage. CAUTION •...
  • Page 6 • Don’t use the packaged AC adapter (that comes standard with Solution Engine2) for other equipment to avoid a risk of electric shock, abnormal heat or fire. • To power an external device from Solution Engine2's internal power supply, don’t supply a current over the permissible level of each power supply.
  • Page 7 Guarantee • The system is repaired for free within a period of guarantee (one year after delivery) so long as it is used under normal conditions (normal environmental conditions, normal usage). The following lists the cases where Solution Engine2 must be repaired for value regardless of the period of free guarantee.

  • Page 8: Table Of Contents

    Table of Contents Notes on Using the MS7760CP01P 1. System Configuration ………………………8 Solution Engine2 Features ………………………8 Solution Engine2 Configuration ………………………8 Solution Engine2 Appearance ………………………10 Solution Engine2 Specification ………………………14 2. Installation ………………………16 Host System Connection ………………………16 AC Adapter Connection ………………………18 Turning ON or OFF Solution Engine2 ………………………19 Using the Debug Board ………………………20 3.
  • Page 9 5. Function Blocks ………………………29 PCMCIA ………………………29 USB Host ………………………33 UART ………………………35 ………………………38 Sound Generator ………………………42 SIM Card Interface ………………………45 6. Power Supply Controller ………………………48 Power Supply Controller Function ………………………48 Serial Communication between the SH7760 and Power Supply Controller ………………………49 RTC (Real-time Clock) Function ………………………55 Touch Panel Function ………………………65 Key Switch Control ………………………85 Power Supply Control ………………………93...
  • Page 10 7. External Interrupts ………………………110 SH7760 External Interrupts ………………………110 8. Solution Engine2 Extension Slots ………………………111 Extension Slot Specifications ………………………111 Extension Slot Signals ………………………112 9. Daughter Board Design Guide ………………………113 Daughter Board Dimensions ………………………113 Daughter Board Power Supply ………………………113 Daughter Board Stack ………………………114 Daughter Board WAIT#Output ………………………114 Extension Slot AC Timing ………………………115 10.

  • Page 11: System Configuration

    1. System Configuration 1.1 Solution Engine2 Features The following summarizes the main features of Solution Engine2. (1) The manual covers all information about Solution Engine2, including the circuit diagrams, connector specifications and internal logic of FPGA employed on this board. (2) The peripheral LSI chips (PCMCIA controller and sound generator chips) are commercially available.
  • Page 12 LCD board interfce AC adapter SIM H HP/MIC LCD1 LCD2 Serial Card 5.6V Supply voltage generation SROM Sound Generator chip H8/3048B UDA1342TS Power supply control LCDC SH7760 3.3V 1.5V UART(2Ch) USBH INTC 8bit SH Local Bus 16bit 32bit 16bit Address Flash SDRAM PCMCIA...

  • Page 13: Solution Engine2 Appearance

    1.3 Solution Engine2 Appearance Solution Engine2 consists of four boards: CPU, LCD, debug and I/O. Figure 1.3 is an external view of the Solution Engine2. Figures 1.4 to 1.7 show the appearances of the respective boards (CPU, LCD, debug and I/O boards).
  • Page 14 LCD interface connector1 LCD interface connector2 Contrast control volume LCD interface connector3 CPU board interface connector2 CPU board interface connector1 Rear view Infrared remote control reception Push-button switch3 Cursor switch1 Push-button switch2 Front view Figure 1.4 LCDBoard-External View...
  • Page 15 System reset switch H8/3048-ONE write connector Infrared remote control transmission LED Extension slot CN15 8-bit DIP switch Serial interface connector CN16 CN17 I/O board interface connector1 SIM card connector I/O board interface connector2 Rear view Earphones/microphones connection connector Headphones connection connector PC Card slot CN10 LCD board interface connector1...
  • Page 16 Extension slot 8-bit LED 16-bit LED EPROM EPROM connection jumper switch H-UDI connector Figure 1.6 Debug Board-External View CN11 CN10 Figure 1.7 I/O Board-External View...

  • Page 17: Solution Engine2 Specification

    Solution Engine2 supply voltages. Table 1-1 Solution Engine2 Function Specifications Item Specification Remarks SH7760 Model name: HD6417760BP200D (Hitachi) Input clock: 16.6667MHz Operating clock (Internal): 200MHz (x 12) (External): 66MHz (x 4) Package: 256-pin BGA Flash Memory...
  • Page 18 Table 1.2 Power supply, Dimensions and Environmental Specifications of Solution Engine2 Item Specifications Environment Operating condition - Temperature: 10-35°C - Humidity: 30 to 85%RH (no dew condensation) - Ambient gas (no corrosive gas) Operating DC 5.6V voltage Dissipation 600mA current Dimensions CPU board: 120mm x 75mm LCD board: 120mm x 75mm...

  • Page 19: Installation

    2. Installation 2.1 Host System Connection To use the monitor program, connect the host interface connector (CN1) of Solution Engine2 to the host system with an RS-232C cross cable (accessory). Figure 2.1 shows a host system connection method. Figure 2.2 shows the pins of a serial interface connector.
  • Page 20 Table 2.1 Serial Interface Connector Signal Pins Pin No Signal name Remarks Output TXB(UART) RXB(UART) RTSB(UART) CTSB(UART) Reserved ISP TCK(*) Reserved GND(*) Reserved ISP TMS(*) Reserved ISP Plug(*) Reserved ISP BScan(*) Reserved ISP TDI(*) Reserved ISP TDO(*) Reserved Vcc(3.3V) (*) * These pins are only used to test the board when it is shipped from the factory.

  • Page 21: Ac Adapter Connection

    2.2 AC Adaptor Connection Figure 2.3 shows an AC adaptor connection method. As shown in Figure 2-3, connect the plug to the AC adaptor connector of Solution Engine2 (1), then connect the adaptor cord to the receptacle (2). Solution Engine2 AC 110V (2) Connect the AC adapter cord to the receptacle.

  • Page 22: Turning On Or Off Solution Engine2

    2.3 Turning On or Off Solution Engine2 To turn on or off Solution Engine2, press the Power Switch (SW2) on the CPU board. To turn it on, press and hold down this switch for 0.5 seconds or more. To turn it off, press and hold down this switch for 4 seconds or more until Solution Engine2 is powered off.

  • Page 23: Using The Debug Board

    2.4.2 Debug Board Connection Figure 2.4 shows a debug board connection method. Connect the debug board to the extension slot (CN4) on the Solution Engine2 board. Solution Engine2 Extension slot (CN2) Connection Extension slot (CN1) Figure 2.4 Debug Board Connection [Notes] When connecting the debug board or detaching the EPROM, turn off Solution Engine2 in advance.
  • Page 24 2.4.3 Debug Board Jumper Switches Table 2.2 describes a method for setting the EPROM selection jumper switch (J1) on the debugger board. For details of a memory map during debug board connection, refer to 4. “Memory Map.” Table 2.2 Setting the EPROM Selection Jumper Switch (J1) Jumper Setting Description...
  • Page 25 H-UDI Debugger Connection 2.4.6 The debug board allows the H-UDI debugger to be connected to the pin 36 (CN2) of the H-UDI (Hitachi-User Debug Interface) connector. Connect the H-UDI and AUD pins of the SH7760 board to the H-UDI connector.

  • Page 26: Description Of Switches

    3. Switches 3.1 CPU Board Switches Figure 3.1 shows the locations of switches (SW1 to SW5) on the CPU board. In addition, this section gives a brief description of each switch in (1) to (5). System reset switch CN15 8-bit DIP switch CN16 CN17 Rear view...
  • Page 27 (4) 8-bit DIP Switch (SW5) Figure 3.2 shows the setting of an 8-bit DIP switch. This DIP switch is connected to the pins ID0 to ID5 and MD5 of the ID register. Be sure to turn off the power-on switch before setting the DIP switch. (a) Switches SW5-1 to SW5-6 are connected to pins ID0 to ID5 (input pins).

  • Page 28: Lcd Board Switch

    3.2 LCD Board Switch The states of the cursor switch (SW1) and push-button switches (SW2 and SW3) are signaled to the SH7760 through the power supply controller. For details, refer to 6. “Power Supply Controller.”...

  • Page 29: Memory Map

    4. Memory Map 4.1 Memory Map for the Solution Engine2 Board Table 4.1 shows an SH7760 memory map for the Solution Engine2 board without expansion board. Table 4.1 SH7760 Memory Map for Solution Engine2 without Expansion Board Area No. Bus width Space Space name Device...

  • Page 30: Memory Map During Debug Board Connection

    4.2 Memory Map during Debug Board Connection Table 4.2 shows a memory map for the SH7760 when the debug board is connected to the Solution Engine2 board and the jumper switch (J1) on the debug board is short-circuited. Table 4.2 also shows a memory map for the SH7760 when the debug board is connected to the Solution Engine2 board and the jumper switch (J1) on the debug board is open.
  • Page 31 Table 4.2 Memory Map during Debug Board Connection (J1: Open) Area No. Bus width Space Space name Device Remarks 16bit h’00000000 Flash memory area area MBM29DL640E-90TN (Fujitsu) x 1 h’00FFFFFF h’01000000 256kB Resource on the EPROM area M27C800-100F1(ST Micro) x 1 debug board h’013FFFFF h’01400000...

  • Page 32: Function Blocks

    5. Functional Blocks 5.1 PCMCIA 5.1.1 Block Description Figure 5.1 shows the PCMCIA control block. As shown in Figure 5.1, the PCMCIA control block contains a controller (MR-SHPC-01 V2 from Marubun), a 68-pin PC card interface connector (CN3) and a power supply controller IC (TPS2211DB from TI).
  • Page 33 5.1.2 Connector Pins Table 5.1 summarizes the pins of a 68-pin PC card interface connector (CN3). Table 5.1(1) PC Card Interface Connector Signal Pins Memory card I/O card Signal name I/O Function Signal name I/O Function Ground Ground Data bit 3 Data bit 3 Data bit 4 Data bit 4...
  • Page 34 Table 5.1(2) PC Card Interface Connector Signal Pins Memory card I/O card Signal name I/O Function Signal name I/O Function Gorund Gorund CD1# Card detection CD1# Card detection Data bit 11 Data bit 11 Data bit 12 Data bit 12 Data bit 13 Data bit 13 Data bit 14...
  • Page 35 5.1.3 Register Map Table 5.2 shows a map for the PCMCIP controller registers. Each of the controller registers must be accessed in words. Table 5.2 PCMCIA Control Registers Address Initial value Register name H’B83FFFE4 H’0000 Mode register H’B83FFFE6 H’000C Option register H’B83FFFE8 H’03BF Card status register...

  • Page 36: Usb Host

    5.2 USB Host 5.2.1 Block Description Figure 5.2 shows the USB host control block. As shown in Figure 5.2, the SH7760 contains an internal USB host controller. This internal controller supports USB Version 1.1 and OpenHCI, and has the following features: •...
  • Page 37 5.2.2 Connector Pins Figure 5.3 shows the pins of the USB host connector (CN7). Pin No Signal name VBUS -DATA +DATA CN7: USB host connector (TYPEA) Model name: 20-5041-004-100-834 Maker: Kyocera Elco Figure 5.3 USB Host Connector (CN7) Pins 5.2.3 Register Map Table 5.2 shows a register map for the SH7727 internal USB host controller registers.

  • Page 38: Uart

    5.3 UART 5.3.1 Block Description Figure 5.4 shows the UART control block. As shown in Figure 5.4, the UART control block contains a controller (ST16C2550 from EXAR), RS232C interface driver and 15-pin connector (CN1). This controller uses the clock pulses (7.3728MHz) supplied from the power supply controller (H8/3048F-ONE) for operations, and determines a baud rate (transfer rate) using these pulses as reference.
  • Page 39 5.3.2 Connector Pins Figure 5.5 shows the pins of a 15-pin serial interface connector (CN1). Pin No Signal name CN1: 15-pin serial connector Model name: RMC-EA15MY-OM15-MC1 Moker: Honda Tsushin Kogyo Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Figure 5.5 15-pin Serial Interface Connector Pins 5.3.3 Register Map Tables 5.4 and 5.5 show register maps for the serial interface controller registers.
  • Page 40 Table 5.5 Serial Interface Control Register Map (Channel B) Address Initial value Register name (at resd) Register name (at write) Remarks H’BA800000 (Receive Holding Register) (Transfer Holding Register) bit7=0 H’BA800000 (LSB of Divisor Latch) (LSB of Divisor Latch) bit7=1 H’BA800002 H’00 (Interrupt Enable Register) (Interrupt Enable Register)

  • Page 41: Lcd

    5.4 LCD 5.4.1 Block Description Figure 5.6 shows the LCD control block. As shown in Figure 5.6, the LCD control block contains an SH7760 internal LCD controller and an LCD panel (TFT liquid crystal panel) mounted on the LCD board that can display 16-bit RGB data with a resolution of QVGA (240 x 320).
  • Page 42 5.4.2 Connector Pins Figure 5.7 shows the pins of the LCD interface connectors (CN5 and CN6). Tables 5.6 and 5.7 summarize the signals of these interface connectors. CN5: LCD interface connector CN6: LCD interface connector Model name: FH12-40S-0.5SH Model name: FH12-24S-0.5SH Maker: Hirose Electric Co., Ltd.
  • Page 43 Table 5.7 LCD Interface Connector (CN6) Signals Signal name Remarks Signal name Remarks Power supply 13 ~PAD_CS OUT PAD I/F Power supply 14 ~PAD_IRQ PAD_I/F KEY_IN0 KEY_I/F PAD_DIN OUT PAD_I/F KEY_IN1 KEY_I/F PAD_DOUT PAD_I/F KEY_IN2 KEY_I/F PAD_DCLK OUT PAD_I/F KEY_IN3 KEY_I/F ~RESET OUT Reset...
  • Page 44 5.4.3 Register Map Table 5.8 shows a register map for the SH7760 internal LCD controller. Table 5.8 LCD Controller Registers Address Initial value Register name H’FE300C00 H’0101 Input clock register H’FE300C02 H’0109 Module type register H’FE300C04 H’000C Data format register H’FE300C06 H’0000 Scan mode register...

  • Page 45: Sound Generator

    5.5 Sound Generator 5.5.1 Block Description Figure 5.8 shows the sound generator control block. As shown in Figure 5.8, this control block contains an SH7760 internal serial sound interface (SSI) and an audio CODEC (UDA1342TS from Phillips) so that sound can be output to headphones connected to an output mini-jack (CN9) or it can be input to earphones connected to an I/O mini-jack (CN10).
  • Page 46 5.5.2 Connector Pins Figure 5.9 shows the pins of the sound generator I/O mini-jack (CN9, CN10). Tables 5.9 and 5.10 list the signals of the sound generator I/O mini-jack (CN9, CN10). CN9,CN10: Sound generator I/O mini-jack ( 2.5) Model name: HSJ1602-010011 Maker: Hoshiden Corporation Figure 5.9 Sound Generator I/O Mini-jack (CN9, CN10) Table 5.9 Sound Generator I/O Mini-jack (CN9) Signals...
  • Page 47 5.5.3 Register Map Table 5.11 shows a register map for the SH7760 internal serial sound interface (SSI). Table 5.11 SSI Control Registers Register abbreviation Address Initial value Access size SSICR0 H’FE680000 H’0000 0000 SSISR0 H’FE680004 H’0200 0003 SSITDR0 H’FE680008 H’0000 0000 SSIRDR0 H’FE68000C H’0000 0000...

  • Page 48: Sim Card Interface

    5.6 SIM Card Interface 5.6.1 Block Description Figure 5.11 shows the SIM card interface control block. As shown in Figure 5.11, this control block contains an SH7760 internal SIM card module (SIM), a power supply/level converter (LTC1555LEGN-1, 8) and an 8-pin connector (CN4) to enable communications with the SIM card inserted into the SIM card interface connector (CN4).
  • Page 49 5.6.2 Connector Pins Figure 5.12 shows the pins of the SIM card interface connector (CN4) and Table 5.12 lists the signals of that connector. CN4: SIM card interface connector Model name: 04-5036-008-110-862 Maker: Kyocera Elco Figure5.12 SIM Card Interface Connector (CN4) Pins Table 5.12 SIM Card Interface Connector (CN4) Signals Pin No Signal name...
  • Page 50 5.6.3 Register Map Table 5.13 shows a register map for the SH7760 internal SIM card module (SIM). Table 5.13 SIM Card Module Register Map Address Initial value Register name H’FE480000 H’20 Serial mode register H’FE480002 H’07 Bit rate register H’FE480004 H’00 Serial control register H’FE480006...

  • Page 51: Power Supply Controller

    6. Power Supply Controller 6.1 Power Supply Controller Functions The H8/3048F-ONE power supply controller (simply called the power supply controller) provides the following control functions by firmware stored in the internal memory. The following functions can be controlled through the UART ChA from the SH7760. Figure 6.1 shows a power supply control block diagram. (1) RTC (real-time clock) function (2) System power supply (3.3V/5/0V) ON/OFF control function (3) Touch panel coordinate position read function...

  • Page 52: Serial Communication Between The Sh7760 And Power Supply Controller

    6.2 Serial Communications between SH7760 and the Power Supply Controller This section describes how serial communications take place between SH7760 and the power supply controller. 6.2.1 Serial Format This subsection describes a format for serial communications between SH7760 and the power supply controller. (1) Mode: Start-stop (2) Baud rate: 38400 bits/second (3) Stop bit: 1 bit...
  • Page 53 6.2.2 Power Supply Control Register Read Procedure This subsection describes a procedure for reading the power supply controller registers. (1) SH7760 issues a read command to a power supply controller. (2) The power supply controller returns a response to SH7760. [Note] (1) Don’t issue multiple commands continually from SH7760.
  • Page 54 6.2.4 Normal Response during a read Operation Figure 6.5 shows the response format for the read command. The power supply controller returns an ACK code, a function code, a register address and target data, in this order, as a response. (1) ACK code (2) Function code (3) Register address...
  • Page 55 6.2.6 Power Supply Control Register Write Procedure This subsection describes the procedure for writing to a controller control of the power supply controller from SH7760. (1) SH7760 issues a write command to the power supply controller. (2) The power supply controller returns a response the SH7760. [Note] (1) Don’t issue multiple commands continually from SH7760.
  • Page 56 6.2.8 Normal Response during a Write Operation Figure 6.10 shows the response format for the write command. The power supply controller returns an ACK code, a function code, a register address and target data, in this order, as a response for the write command. (1) ACK code (2) Function code (3) Register address...
  • Page 57 6.2.9 Error Response during a Write Operation Figure 6.11 shows an error response format for the write command at error occurrence. The power supply controller returns a NAK code and an error code in this order as an error response. (1) NAK code (2) Error No.

  • Page 58: Rtc (Real-Time Clock) Function

    6.3 RTC (Real-time Clock) Functions This section describes the RTC functions. Table 6.1 summarizes the RTC registers. For detailed description of each register, refer to 6.3.1 to 6.3.17. (1) Function for counting the seconds, minutes, hour, day of the week, month and year (BCD code) (2) RTC start/stop function (3) Alarm interrupt function (4) 1sec/0.5sec cyclic interrupt function...
  • Page 59 6.3.1 RTC Control Register (RTCCR) Address: 0x000, Initial value: 0x00 CNTS SECCAF 0.5secI 1secI START (1) START START bit Setting RTC start (Initial value) RTC stop [Note] Don’t write to any counter while the START bit is set to “0.” Rewrite each counter after setting the START bit to “1.” (2) ARI ARI bit Setting...
  • Page 60 (6) CNTS CNTS bit Setting The setting (value) of each counter is not updated. (Initial value) The setting (value) of each counter is updated. [Zero-clear condition] The counter is cleared with zeros when counter update is complete. This clear operation is automatically performed. [Note] Don’t write to any counter while the START bit is set to “0.”...
  • Page 61 6.3.2 RTC Status Register (RTCSR) Address: 0x001, Initial value: 0x00 0.5secF 1secF (1) ARF ARF bit Setting The setting of each alarm register with the AR bit set is not the same as that of each counter register. (Initial value) The setting of each alarm register with the AR bit set is identical to that of each counter register.
  • Page 62 6.3.3 Second Counter (SECCNT) Address: 0x002, Initial value: 0xXX (Not defined) 10 seconds 1 second The counter value is a BCD (Binary Coded Decimal) value. Counting takes place within a range from 00 to 59. When the value changes from 59 to 00, a carry is generated in the minute counter. 6.3.4 Minute Counter (MINCNT) Address: 0z0003 Initial value: 0xXX (Not defined)
  • Page 63 6.3.6 Day-of-the-Week Counter (WKCNT) Address: 0x0005 Initial Value: 0xXX (Not defined) Septinary increnental counter Counting takes place within a range from 0x00 to 0x06. • The following shows the correspondence between the day of the week and the value of the septinary incremental counter.
  • Page 64 6.3.9 Year Counter (YRCNT) Address: 0x0008 Initial value: 0xXX (Not defined) 10 yars 1 year The counter value is a BCD (Binary Coded Decimal) value. Counting takes place within a range from 0 to 99. In this range, 00, 04, ..., 92 and 96 are leap years.
  • Page 65 6.3.10 Alarm Register Each alarm register corresponds to the relevant counter as shown below. If the AR bit (D7) of each alarm is set to “1,” counters will be compared with alarm registers. This comparison is performed only for alarm registers with the AR bit (D7) set to “1” and an alarm interrupt is generated only at correct correspondence.
  • Page 66 6.3.13 Hour Alarm Register (HRAR) Address: 0x000B Initial value: 0x00 10 hours 1 hour The alarm value must be a BCD (Binary Coded Decimal) code between 00 and 23. 6.3.14 Day-of-the-Week Alarm Register (WKAR) Address: 0x000C, Initial value: 0x00 Septinary counter value The alarm value must be set within a range from 0x00 to 0x06.
  • Page 67 6.3.16 Month Alarm Register (MONAR) Address: 0x000E Initial value: 0x00 October January The alarm value must be a BCD (Binary Coded Decimal) code between 01 and 12. 6.3.17 RTC/Touch Panel/Key Input/Power Supply Status Register (RTKISR) This status register indicates the RTC, touch panel or key input status. The following is a brief description of RTC-related status bits.

  • Page 68: Touch Panel Function

    6.4 Touch Panel Functions This section describes the touch panel functions. In addition, Table 6.4 summarizes the touch panel registers. For details of each register, refer to 6.4.1 to 6.4.32. (1) The A/D conversion value of the X or Y position sensed by pen touch is output. (2) Pen touch ON/OFF interrupt function •...
  • Page 69 Table 6.4 Touch Panel Registers Register Abbreviation Address Size Remarks Touch panel control register TPLCR 0x0020 1 byte Touch panel status register TPLSR 0x0021 1 byte Touch panel sampling control register TPLSCR 0x0022 1 byte X position A/D register XPAR 0x0024 2 byte Y position A/D register...
  • Page 70 6.4.1 Touch Panel Control Register (TPLCR) Address: 0x0020 Initial value: 0x00 PEN_ONRE PEN_OFFI PEN_ONI TP_STR (1) TP_STR TP_STR bit Setting The touch panel is disabled. (Initial value) The touch panel is enabled. (2) PEN_ONI PEN_ONI bit Setting A pen touch ON interrupt is not generated. (Initial value) A pen touch ON interrupt is generated.
  • Page 71 6.4.2 Touch Panel Status Register (TPLSR) Address: 0x0021 Initial value: 0x00 PEN_OFFIF PEN_ONIF (1) PEN_ONIF PEN_ONIF bit Setting The touch panel has not been pen-touched. (Initial value) The touch panel has been pen-touched. The touched positions on the touch panel are output to the X position A/D register, Y position A/D register, X position dot register and Y position dot register.
  • Page 72 6.4.3 Touch Panel Sampling Control Register (TPLSCR) The touch panel sampling control register sets a sampling interval for the touch panel. Address: 0x0022 Initial value: 0x01 160msec 140msec 120msec 100msec 80msec 60msec 40msec 20msec A sampling interval for the touch panel can be set within a range from 20msec to 160msec (unit: 20msec). When a bit is set to “1,”...
  • Page 73 6.4.4 X Position A/D Register (XPAR) Address: 0x0024 Initial value: 0x000 XA_D11 XA_D10 XA_D9 XA_D8 XA_D7 XA_D6 XA_D5 XA_D4 XA_D3 XA_D2 XA_D1 XA_D0 The X position A/D register indicates the A/D conversion result of a pen-touched X position on the touch panel. 6.4.5 Y Position A/D Register (YPAR) Address: 0x0026 Initial value: 0x0000...
  • Page 74 6.4.6 X Position Dot Register (XPDR) Address: 0x0028 Initial value: 0x0000 XD_D15 XD_D14 XD_D13 XD_D12 XD_D11 XD_D10 XD_D9 XD_D8 XD_D7 XD_D6 XD_D5 XD_D4 XD_D3 XD_D2 XD_D1 XD_D0 The X position dot register indicates the dot position of a pen-touched X position on the touch panel. Use the output value of this register after calibration.
  • Page 75 6.4.8 XA Position Dot Register (XAPDR) Address: 0x002C Initial value: 0x0000 XAD_D15 XAD_D14 XAD_D13 XAD_D12 XAD_D11 XAD_D10 XAD_D9 XAD_D8 XAD_D7 XAD_D6 XAD_D5 XAD_D4 XAD_D3 XAD_D2 XAD_D1 XAD_D0 The XA position dot register indicates the X dot position of point A when calibration takes place. 6.4.9 YA Position Dot Register (YAPDR) Address: 0x002E Initial value: 0x0000...
  • Page 76 6.4.10 XB Position Dot Register (XBPDR) Address: 0x0030 Initial value: 0x0000 XBD_D15 XBD_D14 XBD_D13 XBD_D12 XBD_D11 XBD_D10 XBD_D9 XBD_D8 XBD_D7 XBD_D6 XBD_D5 XBD_D4 XBD_D3 XBD_D2 XBD_D1 XBD_D0 The XB position dot register indicates the X dot position of point B when calibration takes place. 6.4.11 YB Position Dot Register (YBPDR) Address: 0x0032 Initial value: 0x0000 YBD_D15...
  • Page 77 6.4.12 XC Position Dot Register (XCPDR) Address: 0x0034 Initial value: 0x0000 XCD_D15 XCD_D14 XCD_D13 XCD_D12 XCD_D11 XCD_D10 XCD_D9 XCD_D8 XCD_D7 XCD_D6 XCD_D5 XCD_D4 XCD_D3 XCD_D2 XCD_D1 XCD_D0 The XC position dot register indicates the X dot position of point C when calibration takes place. This register will be functionally enhanced in future.
  • Page 78 6.4.14 XA Position A/D Register (XAPAR) Address: 0x0038 Initial value: 0x0000 XAA_D11 XAA_D10 XAA_D9 XAA_D8 XAA_D7 XAA_D6 XAA_D5 XAA_D4 XAA_D3 XAA_D2 XAA_D1 XAA_D0 The XA position A/D register indicates the X position A/D conversion result of point A subject to calibration/ 6.4.15 YA Position A/D Register (YAPAR) Address: 0x003A Initial value: 0x0000 YAA_D11...
  • Page 79 6.4.16 XB Position A/D Register (XBPAR) Address: 0x003C Initial value: 0x0000 XBA_D11 XBA_D10 XBA_D9 XBA_D8 XBA_D7 XBA_D6 XBA_D5 XBA_D4 XBA_D3 XBA_D2 XBA_D1 XBA_D0 The XB position A/D register indicates the X position A/D conversion result of point B subject to calibration. 6.4.17 YB Position A/D Register (YBPAR) Address: 0x003E Initial value: 0x0000 YBA_D11...
  • Page 80 6.4.18 XC Position A/D Register (XCPAR) Address: 0x0040 Initial value: 0x0000 XCA_D11 XCA_D10 XCA_D9 XCA_D8 XCA_D7 XCA_D6 XCA_D5 XCA_D4 XCA_D3 XCA_D2 XCA_D1 XCA_D0 The XC position A/D register indicates the X position A/D conversion result of point C subject to calibration. This register will be functionally enhanced in future.
  • Page 81 6.4.20 DX Dot Register (DXDR) Address: 0x0044 Initial value: 0x0000 DX1_D15 DX1_D14 DX1_D13 DX1_D12 DX1_D11 DX1_D10 DX1_D9 DX1_D8 DX1_D7 DX1_D6 DX1_D5 DX1_D4 DX1_D3 DX1_D2 DX1_D1 DX1_D0 The DX dot register holds a value obtained by multiplying the number of dots per data (X position A/D conversion result at calibration) by 1,000.
  • Page 82 6.4.22 X Position Dot Calculation A/D Value (XPARDOT) Address: 0X0048 Initial value: 0x0000 XD_D9 XD_D8 XD_D7 XD_D6 XD_D5 XD_D4 XD_D3 The X position dot calculation A/D value register (XPARDOT) holds an AD value of X position dot calculation. This A/D value is obtained by calculating the mean of the previous four XPARDOT values and clearing the low order 3 bits with zeros.
  • Page 83 6.4.25 X Position Dot Calculation A/D Value 3 (XPARDOT3) Address: 0x004E Initial value: 0x0000 XD3_D9 XD3_D8 XD3_D7 XD3_D6 XD3_D5 XD3_D4 XD3_D3 The X position dot calculation A/D value 3 register (XPARDOT3) holds an XPARDOT value before sampling. 6.4.26 X Position Dot Calculation A/D Value 4 (XPARDOT4) Address: 0x0050 Initial value: 0x0000 XD4_D9 XD4_D8...
  • Page 84 6.4.28 Y Position Dot Calculation A/D Value 1 (YPARDOT1) Address: 0 x0054 Initial value: 0x0000 YD1_D9 YD1_D8 YD1_D7 YD1_D6 YD1_D5 YD1_D4 YD1_D3 The Y position dot calculation A/D value 1 register (YPARDOT1) holds a YPARDOT value before sampling. 6.4.29 Y Position Dot Calculation A/D Value 2 (YPARDOT2) Address: 0x0056 Initial value: 0x0000 YD2_D9 YD2_D8...
  • Page 85 6.4.31 Y Position Dot Calculation A/D Value 4 (YPARDOT4) Address: 0x005A Initial value: 0x0000 YD4_D9 YD4_D8 YD4_D7 YD4_D6 YD4_D5 YD4_D4 YD4_D3 The Y position dot calculation A/D value 4 register (YPARDOT4) holds a YPARDOT value before sampling. 6.4.32 RTC/Touch Panel/Key Input/Power Supply Status Register (RTKISR) This status register indicates the RTC, touch panel, or key input status.
  • Page 86 6.4.33 Touch Panel Calibration Method (2-point System) The power supply controller supports 2-point touch panel calibration. Figure 6.11shows the points of the drawing coordinates and A/D conversion coordinates that are necessary for calibration. Origin of T-Engine Board drawing Drawing coordinates: x coordinates axis Point B...
  • Page 87 [Calibration Method] (1) The SH7760 writes the dot points of points A and B to the registers XAPDR, YAPDR, XBPDR, and YBPDR. (2) When point A is pen-touched, it is signaled by a pen touch interrupt. The A/D conversion result of the pen-touched point A is written to the registers XAPAR and YAPAR.

  • Page 88: Key Switch Control

    6.5 Key Switch Control Figure 6.12 shows the Solution Engine2 switches under control by the power supply controller. The power supply controller controls the switches SW1 to SW3 on the CPU board and the switches SW1to SW3 on the LCD board.
  • Page 89 6.5.1 CPU Board Switch Control (1) Power-on switch (SW1) • When the SH7760 is being powered, a power-on switch interrupt occurs for the SH7760 if the power-on switch is pressed and held for 2 seconds or more. • When Solution Engine2 is OFF, it is turned ON if the power-on switch is pressed and held for 0.5 seconds or more. •...
  • Page 90 6.5.3 Key Switch Registers Table 6.5 summarizes the key switch registers. For details of each register, refer to 6.5.4 to 6.5.8. Table 6.5 Key Switch Registers Register Abbreviation Address Size Remarks Key control register KEYCR 0x0060 1 byte Key auto repeat time register KATIMER 0x0061 1 byte...
  • Page 91 6.5.4 Key Control Register (KEYCR) Address: 0x0060 Initial value: 0x20 KEY_OFFI NMIE PONSWI ARKEYI KEY_ONI KEY_STR (1) KEY_STR KEY_STR bit Setting An application switch key input is disabled. (Initial value) An application switch key input is enabled. (2) KEY_ONI KEY_ONI bit Setting An application switch ON interrupt is disabled.
  • Page 92 6.5.5 Key Auto Repeat Time Register (KATIMER) Address: 0x0061 Initial value: 0x01 450msec 400msec 350msec 300msec 250msec 200msec 150msec 100msec This register sets the auto repeat interrupt generation time. The auto repeat interrupt generation time is set at intervals of 100msec to 450msec (unit: 50msec).
  • Page 93 6.5.7 Key Input Status Register (KEYSR) Address: 0x0062 Initial value: 0x00 KEY_OFFF PONSWF ARKEYF KEY_ONF (1) KEY_ONF KEY_ON bit Setting An application switch key has not been turned on. (Initial value) An application switch key has been turned on. At this time, if the KEY_ONI bit is set to “1,”...
  • Page 94 (4) PONSWF PONSWF bit Seeting The power-on switch has not been turned on for 2sec or more. The power-on switch has been turned on for 2 sec or more. At this time, if the PONSWI bit is set to “1,” a power-on interrupt occurs.
  • Page 95 6.5.8 RTC/Touch Panel/Key Input/Power Supply Status Register (RTKISR) This status register indicates the RTC, touch panel, or key input status. Below is a brief description of the status bits for key input. Address: 0x0090 Initial value: 0x00 IRRIF POWERIF KEYIF TPIF RTCIF (1) KEYIF...

  • Page 96: Power Supply Control

    6.6 Power Supply Control This section describes the power supply control functions. Table 6.6 summarizes the power supply controller registers. In addition, refer to 6.6.1 to 6.6.3 for details of each register. (1) Solution Engine2 is turned ON or OFF. (2) When Solution Engine2 is OFF, it is turned ON if the power-on switch is pressed for 2sec or more.
  • Page 97 6.6.1 System Power Control Register 1 (SPOWCR1) Address: 0x0070 Initial value: 0x01 SPOWER (1) SPOWER SPOWER bit Setting System power supply: OFF System power supply: ON (Initial value) 6.6.2 System Power Control Register 2 (SPOWCR2) Address: 0x0071 Initial value: 0x01 SFPOWER (2) SFPOWER SFPOWER...

  • Page 98: Led Control

    This section describes the LED control functions. Table 6.7 summarizes the LED controller registers. Though SH7760 Solution Engine2 has not been provided with LED1 to LED8, LED control is executed. (1) Controlling the ON/OFF State of LEDs (LED1 to LED8) on the CPU board Table 6.7 LED Controller Registers...

  • Page 99: Lcd Front Light Control

    6.8 LCD Front Light Control This section describes the LCD light control functions. In addition, Table 6.8 summarizes the front light control registers. (1) Controlling the ON/OFF state of the LCD front light Table 6.8 LCD Front Light Registers Register Abbreviation Address Size...

  • Page 100: Reset Control

    6.9 Reset Control This section describes the reset control functions. Table 6.9 summarizes the reset control registers. (1) Solution Engine2 reset is controlled. Table 6.9 Reset Registers Register Abbreviation Address Size Remarks Reset control register RESTCR 0x00A2 1 byte 6.9.1 RESTCR Register (RESTCR) Address: 0x00A2 Initial value: 0x02 SWRES SORES...

  • Page 101: Infrared Remote Control

    6.10 Infrared Remote Control This section describes the infrared remote control functions. Table 6.10 summarizes the infrared remote control functions. For details of each register, refer to 6.10.1 to 6.10.8. (1) Support of formats for two kinds of infrared remote control signal Supported format: NEC format and Home Appliance Manufacturer’s Association format (2) Function for receiving infrared remote control signals •...
  • Page 102 6.10.1 Infrared Remote Control Register (IRRCR) Address; 0x00B0 Initial value: 0x00 TDIE RDIE FORMAT START (1) START START bit Setting Infrared remote control is disabled. (Initial value) Infrared remote control is enabled to start data transmission/reception. (2) FORMAT FORMAT bit Setting The NEC format is set, (Initial value) The Home Appliance Manufacturer’s Association format is set...
  • Page 103 6.10.2 Infrared Remote Control Status Register (IRRSR) Address: 0x00B1 Initial value: 0x00 RDBFER (1) RDBFER RDBFER bit Setting A buffer full error has not occurred during a receive operation. (Initial value) A buffer full error has occurred during a receive operation. (2) RDI RDI bit Setting...
  • Page 104 6.10.3 Receive Data Count Register for Infrared Remote Control Signals (IRRRDNR) Address: 0x00B2 Initial value: 0x00 IRRRD_D7 IRRRD_D6 IRRRD_D5 IRRRD_D4 IRRRD_D3 IRRRD_D2 IRRRD_D1 IRRRD_D0 This register indicates the number of received data items (infrared remote control signals) stored in the receive FIFO register.
  • Page 105 6.10.5 Receiving the FIFO Data Register for Infrared Remote Control Signals (IRRRFDR) Address: 0x00B4 Initial value: 0x00 IRRRDR_D7 IRRRDR_D6 IRRRDR_D5 IRRRDR_D4 IRRRDR_D3 IRRRDR_D2 IRRRDR_D1 IRRRDR_D0 This register is an 8-bit FIFO register for storing received data. All the received data can be obtained from this register until it is emptied.
  • Page 106 6.10.8 Infrared Remote Control Data Structure The following shows the relation between the infrared remote control data and repeat codes. In addition, it shows a structure of remote control data in the NEC format. Remote control DATA1 DATA2 ··········· DATAn data Repeat code 0x00...

  • Page 107: Serial Eeprom Control

    6.11 Serial EEPROM Control This section describes the EEPROM control functions. Table 6.11 summarizes the serial EEPROM control registers. For details of each register, refer to 6.11.1 to 6.11.3. (1) Serial EEPROM (512 bytes) can be read and written. Table 6.11 Serial EEPROM Control Registers Register Abbreviation Address...
  • Page 108 6.11.3 EEPROM Data Register (EEPDR) Address: 0x0100 to 0x02FF Initial value: Not defined EEPDR_D7 EEPDR_D6 EEPDR_D5 EEPDR_D4 EEPDR_D3 EEPDR_D2 EEPDR_D1 EEPDR_D0 This register consists of 512 8-bit data in the above format EEPDR address 0x0100 8 bit 0x0101 8 bit •...

  • Page 109: Electronic Volume Control

    6.12 Electronic Volume Control This section describes the electronic volume control functions. Table 6.12 summarizes the electronic volume control registers. For details of each register, refer to 6.12.1 and 6.12.2. (1) An electronic volume value can be set. An electronic volume value can be set within a range from 0x00 (minimum sound volume) to 0xFF (maximum sound volume).

  • Page 110: Initial Values In Thepower Supply Control Registers

    6.13 Power Supply Controller Initial Values The register values for the power supply controller vary depending on the following conditions. Under condition A, all the power supply controller registers are initialized. The initial value of each register is given in the description of each register in this manual.
  • Page 111 Table 6.14 Values under Touch Panel Register Conditions Register Abbreviation Condition A Condition B Condition C Condition D Touch panel control register TPLCR Initial value Initial value Hold Initial value Touch panel status register TPLSR Initial value Initial value Hold Initial value Touch panel sampling control register TPLSCR...
  • Page 112 Table 6.17 Values under LED Register Conditions Register Abbreviation Condition A Condition B Condition C Condition D LED register LEDR Initial value Initial value Hold 0x00 Table 6.18 Values under LCD Front Light Register Conditions Register Abbreviation Condition A Condition B Condition C Condition D LCD front light register...

  • Page 113: External Interrupts

    7. Eeternal Interrupt 7.1 SH7760 External Interrupts Figure 7.1 shows a mechanism for the SH7760 interrupt signal. Table 7.1 shows the levels for respective interrupt signals. As shown in Figure 7.1, interrupt signals from devices within Solution Engine2 are converted into the /IRL signals by FPG, then output to the /IRL [3:0] of the SH7760.

  • Page 114: Solution Engine2 Extension Slots

    8. Solution Engine 2 Extension Slot 8.1 Extension Slot Specifications Connector number: CN2 Solution Engine2 connector model: 20-5603-14-0101-861 (Kyocera Elco) Adaptable connector model: 10-5603-14-0101-861 (Kyocera Elco) 3.00mm 75.00mm Center of 3mm x 3mm CN 1 Serial interface connector (Clearance 0.58 Giude pin 0.98 Giude pin Extension slot 37.50mm...

  • Page 115: Extension Slot Signals

    8.2 Extension Slot Signal Assignment Table 8.1 shows the assignment of extension slot signals. Table 8.1 Extension Slot Signal Assignment Signal name Signal name Signal name Signal name 5V (*1) 106 SCIF2_CTS# 107 - EPROMCE# 108 - CS2# 109 GND CS4# 110 GND CKIO...

  • Page 116: Daughter Board Design Guide

    9. Daughter Board Design Guide This chapter describes the design of the daughter board to be connected to the extension slot of Solution Engine2. The daughter board may contain user-specific devices and can be controlled by the address bus, data bus, and control signals of the SH7760 that connect to the extension slots of Solution Engine2.

  • Page 117: Daughter Board Stack

    9.3 Daughter Board Stack A maximum of 3 daughter boards can be stacked. When multiple daughter boards are stacked, care should be taken for electric capacity. Figure 9.2 shows an example of daughter board stacks. Solution Engine2 Extension slot: 20-5603-14-0101-861 Daughter board Extension slot: 10-5603-14-0101-861 Extension slot: 20-5603-14-0101-861...

  • Page 118: Extension Slot Ac Timing

    9.5 Extension Slot AC Timing As shown in Figure 9.4, the SH7760 bus signal is output to the extension slot via the bus buffer. For this reason, the bus signal delays approx. 8nsec for the AC timing of the SH7660 bus. When designing the daughter board, consider this delay.
  • Page 119 CKIO A25-A0 D31-D0 (At Read) WED1 WED1 WEDF DACD DACD DACKn (SA: IO-Memory) DACD DACD DACKn (DA) Note: IO: DACK DEVICE SA: Single address DMA Transfer DA: Dual address DMA Transfer DACK in High Active F i g u r e 9 . 5 M e m o r y B y t e c o n t r o l S R A M B u s c y c l e B a s i c R e a d c y c l e (No wait, Address set up/Insert hold time, AnS=1, AnH=1)

  • Page 120: Monitor Program Usage

    10. Monitor Program Usage 10.1 Monitor Program Usage (1) Host system connection Connect the host system serial port to the Solution Engine2 CN1 with an accessory RS-232C cross cable. When serial connection is complete, start communication software (HyperTerminal or Windows terminal. Make communication settings as shown in Table 12.1.
  • Page 121 ================================================ SH7760 Self Debugger Ver x.xL (****/**/**) ----------------------------------------------------------------------------- (C) Copyright 2002-2005. Hitachi.Ltd. All rights reserved. ================================================= H [elp] for help messages... Ready > In the above starting message, a version number is displayed in xx.
  • Page 122 (4) User program download When a user program is downloaded into the user RAM, use the ml command. As shown below, enter “ml” at the command prompt. Ready > ml After command entry, the following transfer request message is output from the monitor program, and the message is displayed on the host system screen.
  • Page 123 (5) Display and change of register data Before executing a program, set a stack point for the program loaded into memory in R15. Because R15 is already set to h’AFFF0000,’ make the following change if the stack pointer is to be placed in a different location. Ready >RW R15 AFC00000 When register setting is complete, the monitor program displays information on all the registers and enters a command prompt (command entry wait status).
  • Page 124 (6) Memory data dump Enter the ml command to check the program transferred to the user memory. This ml command must be entered as shown below. Ready >MD AC000000 Once the ml command is executed, the contents of a 256-byte area (for example, h’AC000000 to h’A00000FF) are dumped.
  • Page 125 (7) User program execution Use the g command to run the program transferred to the user memory. Enter this g command as shown below. Ready >G AC000000 As shown above, the address h’AC000000 is set in the program counter (PC), and the program is run from that address.
  • Page 126 (9) Breakpoint setting Use the bs command to set a breakpoint. Enter the bs command as shown below. If the bs command is entered as shown below, a breakpoint will be set at the address h’AC00000. If the monitor program is run in this state, a break will occur at that address and the user program will stop.
  • Page 127 (11) Write to the flash memory To transfer the user program to the user RAM and write it to the flash ROM, use the fl command. Enter “fl 0” at the command prompt. Before writing to the flash ROM, erase the flash ROM first. Figure 10.2 shows the procedure for writing the user program to the flash ROM and executing it from the flash memory.
  • Page 128 Start of erite processing Connect the host system with an accessory RS-232C cable. Mount the EPROM of Vxx on the debug board. Short-circuit the jumper pin (J1) on the debug board. Connect an AC adapter to CN4. Start terminal software on the host system.

  • Page 129: List Of Monitor Program Fubctions

    10.2 List of Monitor Program Functions Table 10.2 summarizes the monitor program commands. Table 10.2 List of Monitor Program Functions Category Command Description Host PC interface ML (Memory Load) Downloads an object from the host. Write to the flash ROM FL (Flash Load) Writes to a flash ROM.

  • Page 130: Command Description

    10.3 Command Description Command Function ML (Memory Load) Loads an object from the host. Option None Format ML ( offset address ) Example: Ready >ML Ready >ML AC000000 (Note) Though a program can be loaded by specifying an offset address, it is effective only when the program to be loaded does not depend on the absolute address.
  • Page 131 Command Function FL (Flash Load) Writes data and programs into Flash ROM Option "0" must be specified for a data/program transfer destination Format FL 0 Example: Ready>FL Write FL command to Flash ROM as follows. (1) Make Flash ROM image on SDRAM Make Flash ROM image on SDRAM by copying Flash ROM data to the first 8M-byte area of the SDRAM address (2) Download S format object file Transfer MOTOROLA S format object file on PC to SDRAM.
  • Page 132 Command Function RR (Register Lead) Reads all the registers. Option None Format Example: Ready >RR Command Function RW (Register Write) Writes data to the corresponding register. Option None Format RW Example: Ready >RW R0 12AB Function Command RC (Register Clear) Clears all registers with zeros.
  • Page 133 Command Function ME (Memory Edit) Edits Memory Option -W,-L Word access, log word access Format ME
    ( option ) Example: Ready >ME AC000000 Ready >ME AC000000 -W Ready >ME AC000000 -L Function Command MD (Memory Dump) Dumps Memory Option Display in ASCII codes Format MD ( start address ) ( end address )
  • Page 134 Command Function DA (Disassemble) Disassembles from a specified address. Option None Format DA ( start address ) Example: Ready >DA AC000000 Command Function G (Go) Executes a program from a specified address. Option None Format G ( start address ) Example: Ready >G AC000000 Command Function...
  • Page 135 Command Function BD (Breakpoint Delete) Disassembles from a specified address. Option None Format BD
    Example: Ready >BD 45C Command Function BS (Breakpoint Set) Sets a breakpoint. Option None Format BS ( address ) Example: Ready >BS AC000000 Command Function BC (Break Clear) Deletes all the breakpoints.
  • Page 136 Command Function BI (Break Ignore) Ignores a breakpoint. Option None Format Example: Ready >BI Command Function BE (Break Enable) Causes a break at a breakpoint. Option None Format Example: Ready >BE...
  • Page 137 Function Command Gives a description of the monitor system H (Help) command. Option ( number ) Gives a description of the corresponding item. Format H ( number ) Example: Displays a help menu. Ready >H ----------------------------------------------------------------------------------------------------- Debugger Help : Address or data must be specified by hex (need not H') ----------------------------------------------------------------------------------------------------- [1] General --- H...
  • Page 138 1st Edition, Mar. 2004 Publication Date: Published by: Ubiquitous Platform Design Dept. Hitachi ULSI Systems Co., Ltd. Edit by: Ubiquitous Platform Design Dept. Hitachi ULSI Systems Co., Ltd. Copy right: ©Hitachi ULSI Systems Co.,Ltd., 2004. All rights are reserved. Printed in Japan...

Table of Contents