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70/46
Reference manual
RCA 70/46 Reference Manual
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Contents
Table of Contents
Table of Contents
Table of Contents
RCA Model 70/46 Processor
Organization of Data
Data Formats
Numbering System
System Structure
Main Memory
Non-Addressable Main Memory
Scratch-Pad Memory
Translation Memory
Read-Only Memory
Program Control and Arithmetic Unit
Input/Output Control
Interval Timer
Instruction Formats
RS Format
SI Format
SS Format
Addressing
Program Interrupt
Introduction
Processor States
Processing State PI
Machine Condition State P 4
Processor State Registers
Program Counter
General Registers
Floating-Point Registers
Interrupt Status Registers
Interrupt Mask Registers
Program Mask Registers
Register Addressing
Interrupt Flag Register
Table of Contents
Interrupt Conditions
Interrupt Mechanization
Automatic Interrupt
Power Failure
External Signal no
Interval Timer
Elapsed Time Cluck 2 16 P a
Console Interrupt Request
Selector Channel no
Paging Error
Paging Queue
Supervisor Call Instruction 2 20 P a
Privileged Operation
Address Error
Data Error
Divide Error 2 26 P a
Exponent Overflow
Exponent Underflow** 2 28 P a
Decimal Overflow
Fixed Point Overflow
Test Mode
Program Controlled Interrupt
INPUT/OUTPUT Introduction
Selector Channels
Multiplexor Channel
Input/Output Operation
Assembly/Status Register
(Cont'D) Input/Output Initiation
Channel Servicing
Channel Address Word ( CAW)
Channel Block Address (CBA)
Channel Command Word (CCW)
Input/Output Channel Registers
Channel Address Register (CAR)
Channel Command Register-II (CCR-II)
Channel Command Register-I (CCR-I)
CBA Register
Input/Output Instructions
Start Device Instruction
Halt Device Instruction
Test Device Instruction
Check Channel Instruction
Input/Output Status Indicators
Condition Code
Channel Status Byte
Standard Device Byte
Sense Bytes
Channel Servicing
Servicing a Data Transfer
End and Chaining Servicing
Interrupt Servicing
MULTI-PROCESSOR INSTALLA Tlon
MULTI-PROCESSOR Introduction
Direct Control Interface
Static out Lines
Static in Lines
Signal out Line
External Signal in Line
Power Failure Line (PFND)
Power Failure Inhibit in Line (PFIR)
Dual Processor Complex
Master/Satellite Complex
Maximum Multi-Processor Complex
Operational Procedures
Transmission Procedure
Response Procedure
Interrupt Action
Privileged Instructions
Function Call (FC)
Special Function # 1 Load Translation Memory (LTM)
Special Function #2 Scan Translation Memory and Store (STMS)
Special Function # 3 Store Translation Memory (STM)
Fixed-Point Instructions
(Cont'D) Shift Left Single (SLA)
Shift Right Single (SRA)
Shift Left Double (SLDA)
Shift Right Double (SRDA)
Decimal Arithmetic Instructions
Instruction Format
Condiiion Code Utilization
Interrupt Action
Add Decimal (AP)
Subtract Decimal (SP)
Zero and Add (ZAP)
Compare Decimal (CP)
Multiply Decimal (MP)
Divide Decimal (DP)
Pack (PACK)
Unpack (UNPK)
Move with Offset (MVO)
Logical Instructions
Instruction Formats
Condition Code Utilization
Interrupt Action
Move (MVI) (MVC)
Move Numerics (MVN)
Move Zones (MVZ)
Test and Set (TS)
Compare Logical (CLR) (CL) (CLI) (CLC)
And (Nr) (N) (Ni) (Nc)
Or (Or) (0) (01) (Oc)
Exclusive or (XR) (X) (XI) (XC)
Test under Mask (TM)
Insert Character (IC)
Store Character (STC)
Load Address (LA)
Translate (TR)
Translate and Test (TRT)
Edit (ED)
Edit and Mark (EDMK)
Shift Left Single Logical (SLL)
Shift Right Single Logical (SRL)
Shift Left Double Logical (SLDL)
Shift Right Double Logical (SRDL)
Branching Instructions
Instruction Formats
Interrupt Action
Branch on Condition (BCR) (Be)
Branch and Link (BALR) (BAL)
Branch on Count (BCTR) (BCT)
Branch on Index High (BXH)
Branch on Index Low or Equal (BXLE)
Execute (EX)
Floa Ting-Point Instructions
Representation of Numbers
Normalization
Instruction Formats
Interrupt Action
Load (LER) (LE) (LDR) (LD)
Load and Test (LTER) (LTDR)
Load Complement (LCER) (LCDR)
Load Positive (LPER) (LPDR)
Load Negative (LNER) (LNDR)
Add Normalized (AER) (AE) (ADR) (AD)
Add Unnormalized (AUR) (AU) (AWR) (AW)
Subtract Normalized (SER) (SE) (SDR) (SD)
Subtract Unnormalized (SUR) (SU) (SWR) (SW)
Compare (CER) (CE) (CDR) (CD)
Halve (HER) (HDR)
Store (STE) (STD)
Multiply (MER) (ME) (MDR) (MD)
Divide (DER) (DE) (DDR) (DD)
Optional Features
Feature 5019-46 - Elapsed Time Clock
Feature 5003-46 - Direct Control
Feature 5040 Selector Channel
Feature 5041- Selector Channel
Feature 5042 Selector Channel
Appendices
B - Program Interrupts
C - Input/Output Service Request
Extended Binary-Coded-Decimal Interchange Code
E - USA Standard Code for Information Interchange
Character Codes
Powers of Two Table
H - Hexadecimal-Decimal Number Conversion
Quick Links
1
Rca Model 70/46 Processor
5iPEL:IRA~'u
70/46
Processor
Reference Manual
OOm3LlD
Information
Systems
70-46-601
March 1968
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This manual is also suitable for:
Spectra 70
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