Timers, Counters And Code Blocks Supported By Cpu 1217C - Siemens S7-1200 System Manual

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Technical specifications
A.6 CPU 1217C
Technical data
Temporary (local) memory
Signal modules expansion
SB, CB, BB expansion
Communication module expansion
High-speed counters
Pulse outputs
Pulse catch inputs
Time delay interrupts
Cyclic interrupts
Edge interrupts
Memory card
Real time clock accuracy
Real time clock retention time
The slower speed is applicable when the HSC is configured for quadrature mode of operation.
1
Table A- 89
Performance
Type of instruction
Boolean
Move Word
Real math
A.6.2

Timers, counters and code blocks supported by CPU 1217C

Table A- 90
Blocks, timers and counters supported by CPU 1217C
Element
Blocks
Type
Size
Quantity
Address range for FBs, FCs,
and DBs
880
Description
16 Kbytes for startup and program cycle (including associated FBs and FCs)
6 Kbytes for each of the other interrupt priority levels (including FBs and FCs)
8 SMs max.
1 max.
3 CMs max.
Up to 6 configured to use any built-in or SB inputs (refer to CPU 1217C Digital
input (DI) H/W configuration table) (Page 882)
1 MHz (Ib.2 to Ib.5)
100/
80 kHz (Ia.0 to Ia.5)
1
30/
20 kHz (Ia.6 to Ib.1)
1
Up to 4 configured to use any built-in or SB outputs (refer to CPU 1217C Digital
output (DQ) H/W configuration table) (Page 882)
1 MHz (Qa.0 to Qa.3)
100 kHz (Qa.4 to Qb.1)
14
4 total with 1 ms resolution
4 total with 1 ms resolution
12 rising and 12 falling (16 and 16 with optional signal board)
SIMATIC Memory Card (optional)
+/- 60 seconds/month
20 days typ./12 days min. at 40 °C (maintenance-free Super Capacitor)
Execution speed
0.08 μs/instruction
1.7 μs/instruction
2.3 μs/instruction
Description
OB, FB, FC, DB
64 Kbytes
Up to 1024 blocks total (OBs + FBs + FCs + DBs)
FB and FC: 1 to 65535 (such as FB 1 to FB 65535)
DB: 1 to 59999
S7-1200 Programmable controller
System Manual, 03/2014, A5E02486680-AG
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