Operation Of The High-Speed Counter - Siemens S7-1200 System Manual

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High-speed counters use a DInt value to store the current count value. A DInt count value
has a range of -2147483648 to +2147483647. The counter rolls over from the maximum
positive value to the maximum negative value when counting up, and from the maximum
negative value to the maximum positive value when counting down.
HSC
HSC1
HSC2
HSC3
HSC4
HSC5
HSC6
If an error occurs, ENO is set to 0 and the STATUS output indicates a condition code.
Table 9- 3
STATUS (W#16#)
0
80A1
80B1
80B2
80B3
80B4
80C0
80D0
9.1.1

Operation of the high-speed counter

High-speed counters (HSC) can count events that occur faster than the cyclic OB execution
rate. If the events to be counted occur slower than the execution rate of the OB, you can use
CTU, CTD, or CTUD standard counter instructions. If the events occur faster than the OB
execution rate, then use the faster HSC device. The CTRL_HSC instruction allows your
program to programmatically change some of the HSC parameters.
For example: You can use the HSC as an input for an incremental shaft encoder. The shaft
encoder provides a specified number of counts per revolution and a reset pulse that occurs
once per revolution. The clock(s) and the reset pulse from the shaft encoder provide the
inputs to the HSC.
The HSC is loaded with the first of several presets, and the outputs are activated for the time
period where the current count is less than the current preset. The HSC provides an interrupt
when the current count is equal to preset, when reset occurs, and also when there is a
direction change.
As each current-count-value-equals-preset-value interrupt event occurs, a new preset is
loaded and the next state for the outputs is set. When the reset interrupt event occurs, the
first preset and the first output states are set, and the cycle is repeated.
S7-1200 Programmable controller
System Manual, 03/2014, A5E02486680-AG
Current value data type
DInt
DInt
DInt
DInt
DInt
DInt
Execution condition codes
Description
No error
HSC identifier does not address a HSC
Illegal value in NEW_DIR
Illegal value in NEW_CV
Illegal value in NEW_RV
Illegal value in NEW_PERIOD
Multiple access to the high-speed counter
High-speed counter (HSC) not enabled in CPU hardware configuration
Technology instructions
9.1 High-speed counter
Default current value address
ID1000
ID1004
ID1008
ID1012
ID1016
ID1020
411
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