Set And Reset Dominant Bistable - Siemens SIMATIC S7 System Manual
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Also See for SIMATIC S7:
- System manual (796 pages) ,
- Functional safety manual (212 pages) ,
- User manual (134 pages)
Table of Contents
Program instructions
7.1 Bit logic
7.1.9
Set and reset dominant bistable
LAD/FBD
Description
1
The bit parameter assigns the Boolean address that is set or reset. The optional OUT connection
reflects the signal state of the Bit parameter.
SR (Set dominant bistable) is a latch where the set dominates. If the set (S1) and reset (R) signals
are both true, the output (OUT) is true.
RS (Reset dominant bistable) is a latch where the reset dominates. If the set (S) and reset (R1) sig-
nals are both true, the output (OUT) is false.
Not applicable for STL
1
Input / outputs
Data type
bit
BOOL
S1, R (LAD SR)
BOOL
S, R1 (LAD RS)
BOOL
OUT (LAD)
BOOL
S1, R (FBD SR)
BOOL
S, R1 (FBD RS)
BOOL
OUT (FBD)
BOOL
SR truth table
RS truth table
180
Operand
I, Q, V, M, S
Power flow
Power flow
Power flow
I, Q, V, M, SM, S, T, C, L, Logic flow
I, Q, V, M, SM, S, T, C, L, Logic flow
I, Q, V, M, SM, S, T, C, L, Logic flow
S1
0
0
1
1
S
0
0
1
1
R
0
1
0
1
R1
0
1
0
1
System Manual, V2.3, 07/2017, A5E03822230-AF
Out (bit)
Previous state
0
1
1
Out (bit)
Previous state
0
1
0
S7-200 SMART
- Quick Links:
- S7-200 Smart Cpu
- Connecting to the Cpu
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